CPU issues I/O control load specifying a scan data operation.
CPU issues an I/O control load-set start which starts the sequence counter. Beginning at the next sector pulse, the scan operation is executed.
Scan Data, Hi or Low, or Equal
The contents of all or portions of the disk data field can be compared to a fixed data field in the CPU and the results indicated as being high or low or equal.
The result of this operation is simply an indication of the comparison with neither the data on the disk or in the CPU being changed in any way.
. - CPU issues I/O control load specifying a scan data operation.
r--CPU issues an I/O control load-set start which starts the sequence counter. Begin-ning ,atthe next sector pulse, the write ID operation is executed.
Control Load Command DISK-t1
•
DG060 Reset Byte Counter DG010 Fast Sync
DG040 (load) SERDES DG030 (Strobe the sync byte)
DG090 CRC Set (to 1's)
Read from disk searching for hex OE sync byte.
Cycle steal 10 from storage, and compare with 10 read from disk. Develop CRC in CRC register.
Read Clock
2 I 3 I 4 I
1012345671° ... ·710 710 710 710 5
and compare with the CRC register.
_________ ~_~T~m~n~ri~er~T~R~~~_R_e~g_FI~ag~. _ _ ~B~R~6~._=---~.~,~-~B~R~6~1I~---.IIL---~~---______ ~
F CHi CLaw S W
---~·F~----~·C~--~B~R7~·C~----~I~H---I---~---c.
SC6 - Read 1F
________________________ ~IS=C~41~11~F~I=-.~I~I~I~I~ILIL1 ____________________ ~---~(~~ro=b~el---~~lul~I~I~I~1~I~I~I ~I~I ~I ~I~I~I~I ________ ~ Preset
Scan Data (Continued)
From facing page.
I
I
Read from disk, searching for hex DE sync byte.
Attachment
(See DISK-9.)
I I
I
Read hex Compare data read from Develop CRein Read CRC from Read hex FFs fromI
, DE from , storage with data read CRC register. disk and compare disk. End Op. . ..
I
I
disk. PresetI
from disk. Scan hit disk with CRC register.I
I
CRC to 1's.I
data equal, low, or high ,I I
{tested for by jump I/OI
command).
I , I
4t~~---~--~I----_'~---~~~~---~---~---~1---I
A . . WriteClock _I ... , . _ - - - _ - - -_ _ ~(..,.(---ReadClock---.:...---'4{"---.,
I
. . , 9 ABC 0 E F 1 0 1 1 1 2 0 BC=--0--If---1 1 2----JI-..:...'-'-IJIf--- 255 1 256 1_ 256+1 1 256+2-+-+3-+-+4-+-+5-+-+6~+7--1-+8-4
.07,0. 7.0 ~Q70·7.07.07.oi.(j7,O 710-.-0-010 34 7,0 34 10 34 7'O~ ~ 7,0 34 7,0 34 7,0 34 7,0 34 7,0 7& 7,0 7,0 7,0· 7,0 7,
'I I I
~---~.SC.9~---~~~ I ,
~~"".sg'8""L-~~---~---1 ' I
. . . 1 . . . - - ,
I, 0
G
S~tor - -Pulse
) ~ . t I
~---~_I-_~\
(TransferLI,U. 1
sca
BC12i (~~6)
store) •I I i ' I·
4D
IridellPulse...---....:.==.:...-~DO~·
- -..D~1--~D~2 ~ ~'!54
0255 .,'I
f---_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ ~B~R7~. _ _ _ _ _ • _ _ _ _ _ _ .y)~
• • I '
1---.L....
1 L-I1I-.r.1...J...1.L.J11 _ _ _ _ _ _ _ _ _ --'----'lUI 1_
SC=10 J J SC'12 RD1F
~~_---~~
. . .L---_-_-_-_--~(S~tr~ob~e~)~IUllIJIJIJIUIUIUI1III1111111IJL
_ _ _ _ _ _ _ _ _ _~
_ _ _ _ _ _-e 0
e e
Write Clock, Read Clock Fast Sync StandarCllzeCl
41
~---~---~~~~---S-~·t·or··+ Index
Data
I i
SERDESI
G
SC 10 BR6, l Head SelectJ
CD
Read Circuits DISK-28
Disk Drive
J
Servo
I
Track
:
Servo -~
Follow-Head ing
Circuit
I
! I
(r0tl Write!
Clocks index )
I
Pulse Data
Sector Pulse
I
HeadsI
r - - Read/ ~
1
Trans. DataI I
ampPre-L~!J
I
Data
-Sepa-
J) I
Write Driver-. rator -;;;JT
I I I ,
I
··DtSK-25
Write
Write zeros (data bits) is gated, in the M FM encoder/shift register, by '1 F write clock' pulses to produce coded data. Both leading and trailing edges of the coded data pulses are defined in an edge clocking latch. Coded and defined data is transmitted, via the line driver and receiver, to the write data trigger.
Write gate sets the write data trigger and the data is transmitted to the write drivers.
Modified Frequency Modulation (MFM)
MFM is the form in which data is recorded on the data tracks.
Data is transmitted on the write zeros line; when the line is positive, a 1 is indicated and when the line is negative, a 0 is indicated.
A two stage shift register and the MFM en-coder shift the data bits by one 1 F clock cycle.
A 1 bit is transmitted during the second half of a 1 F clock cycle. A 0 bit is transmitted during the first half of a 1 F clock cycle, except when a 0 immediately follows a 1 bit, in this case no bit is transmitted during the. 1 F clock cycle.
MFM Encoding
The diagram below shows the input, shifting, and encoding and writing of data (100100).
One Head l!i!!;*.
J04 Transitionsl
D-W1A4D05
-
Write Driver~ ~
I~
Write Current On'1<'>08 • Write Current: D-W1A4D07 Current
§ource
'---r--.,..J~ WriteSelect
IB1~
IRd SellWr Sel~24V
Shift Register
Trigger
h LR_ec_e_iv_er,..j~
Data Transmission Line
I
'L - , 1 uvo Write Gate 1 J07 ~---~~~~~~---,lTransitions
Voltage at 005 during 'write' +4.5!5.5 volts dc with noise levels of 70 mV +5 mV ac. (This noise level is system dependent; the level given is an example from a standalone disk drive.) Because this line is active only during write mode, the line appears to be pulsing.
:!write Current
007 (write current 1 test point) measured differ-entially with respect to -4V (D-W1A4B06) the voltage is within the range 0.99V to 1.24V.
A2E2
CAUTION
Use extreme care when probing these points as 008 is ground.
Read Circuits (DISK-28) Echo Check
10 during Write ID and Data during Write Data
DISK-26
Write 10 and Write Data WaveForms
All wave forms use write gate-A2D2G05 as a sync point, with a times 10 grounded probe. The ampli-tude of signals may vary from one machine to another. Two scope signals are shown on one picture in order to:
- Show opposite polarities of signals.
- Save space onpage.
Write 10
Pictures taken while running Friend test using the following commands and options:
Write 10 Sector 0 Select head 0
Restore original control field Loop on table
This wave .form shows write gate. Write gate is
active once during a write 10 command.
'~
Chan 1 Write Gate D2G05 Sync Internal- Write Gate D2G05 Voltage: 0.1 V/div
Time: 5.0 p.s/div DC Input
Dial the delay time multiplier to zero, then slowly advance the multiplier to get this picture. \ Chan 1 Write Zeros D2J12
Sync External - Write Gate D2G05 Voltage: 0.2 V/div
Time: Main sweep 20 p.s/div Delayed sweep 1.0p.s/div DC Input
Sync External - Write Gate G05 Voltage: 0.1 V/div
Time: Main sweep 20 p.s/div Delayed sweep 1.0 p.s/div DC Input writing hex A's while looping on the Friend test.
9.1 or 13.7 megabytes, track 302 (hex 012E), sec-tor 0, head O.
5.0 megabytes, track 168 (hex 00A8), sector 0, head O.
3.2 megabytes, track 108 (hex 006C) , sector 0, head O.
Pictures taken while running Friend test using the following commands and options:
Write data Sector 0 Select head 0 M/S data field 1 Loop on table Set/dump data fields Preset M/S data field 1 Enter hex AAAAs
This wave form shows write gate. Write gate i s -active once during a write data command.
Chan 1 Write Gate D2G05
Dial the delay time multiplier to zero, then
I
slowly advance the multiplier to get this picture ..
Chan 1 Write Zeros D2J12 Sync External ~ Write Gate D2G05 Voltage: 0.2 V/div
TIme: Main Sweep 50 p.s/div Delayed Sweep 0.5 p.s/div DC Input
-hex AAs written in data field. Delayed Sweep 0.5 p.s/div DC Input Delayed Sweep 0.5 p.s/div DC Input Delayed Sweep 0.5 p.s/div DC Input
ITwo wave forms shown on· one picture.
III II
CL
-•
.-L
-01SK·27