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Chapter 3. MCS·48 Assembly Language Instructions
jump If Accumulator Bit Is Set
Opcode Operand
JBb address b=O-7
I b b b 1 1 0 0
o
addressControl passes to the specified address if accumulator bit 'b' is set to one. The 8021 and 8022 do not recognize this instruction.
Example:
J B41S1 : J B4 NEXT ;JUMPTO 'NEXT' ROUTINE
;IF ACC BIT 4=1
SAMPLE PROGRAMS
The following examples demonstrate addition, subtraction, multiplication, and number comparison using 8-bit, 16-bit, and BCD quantities. Analog/digital conversion and a keyboard scan are also demonstrated.
Addition With 8-Bit Quantities
Add 8-bit symbolic values ADDEND and AUGEND and place their sum in Register 7.
ADD8: MOV A,#ADDEND
ADD A,#AUGEND
MOV R7,A
Addition With 16-Bit Quantities
Add two 16-bit numbers and store their sum in registers 6 (high-order byte) and 7 (low-order byte).
ADD16: MOV A,#ADDLOW
ADD A,#AUGLOW
MOV R7,A MOV A,#ADDHI
ADDC A,#AUGHI ;INCLUDE OVERFLOW FROM
;PREVIOUS ADD IN ADDITION MOV R6,A
Addition With BCD Quantities
Add the BCD number whose LSD is at location BETA to the BCD number whose LSD is at location ALPHA and store the result in ALPHA. Length of number is 'COUNT' digit pairs. For this example, assume both numbers are
Chapter 3. MCS-48 Assembly Language Instructions
Subtraction With 8-Bit Quantities
;AUGEND, SUM LSD
Subtract 8-bit subtrahend from 8-bit minuend using two's complement addition and store difference in register 7.
SUB8: MOV A,#5UBHND
CPL A ;ONE'S COMPLEMENT A
INC A ;TWO'S COMPLEMENT A
ADD A,#MINEND MOV R7,A
Subtraction With 16-Bit Quantities
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Subtract two 16-bit numbers and store their difference in registers 3 (high-order byte) and 4 (low-order byte). Note the use of ADD, rather than INC, to form the two's complement numbers; INC does not affect the carry bit.
;STORE TEMP SUBHI COMP
;BEGIN ADDITION
;STORE LOW-ORDER DIFF
;STORE HIGH-ORDER DIFF
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Chapter 3. MCS·48 Assembly Language Instructions accumulator are required to justify the product correctly.
MPY8X8: MOV RS,#9 ;8 + 1 IN LOOP COUNTER
MOV R6,#MCAND ;MULTIPLICAND IN REG 6
MOV R3,#MPLIER ;MULTIPLlER, LOW PARTIAL
;PRODUCT IN REG 3
Compare Memory to Accumulator
Make an unsigned comparison between the contents of a memory location and the accumulator. Save original accumulator contents temporarily in register S.
COMPAR: MOV R5,A
Construct an A/D converter from a D/ A converter, a comparator op-amp, and a successive-approximation software routine. A/D conversion (on-chip) for the 8022 is described in Chapter 1 under "8022 Microcomputer."
Chapter 3. MCS-48 Assembly Language Instructions
P11---+--i~
8048
ADCON: MOV R7,#8H CLR A MOV R5,A MOV R6,A CLR C CPL C LOOP: MOV A,R5
RRC A MOV RS,A ORL A,R6 OUTL P1,A
JTO DROP MOV R6,A DROP: DJNZ R7,LOOP
Matrix Keyboard Scan (4X4)
DAC ANALOG INPUT
VIN
OP-AMP OUTPUT IS elF V2 < VIN
11F V2 > VIN
;COUNTER R7=8
;CLEAR A,R5,R6
;SET CARRY
;ROTATE TEST BIT
; RIGHT FROM MSB TO LSB
;ADD TO R6 VALUE
;TEST NEW VALUE
;IF TO=l, DROP NEW VALUE
;IF TO=O, SAVE NEW VALUE
;TEST NEXT BlT
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A keyboard is arranged such that any key pressed in any of four vertical columns returns a recognizable signal to the • microprocessor. When the key is pressed, its signal goes low and a 0 is returned to the processor. (For example,
pressing key 9 returns the bit pattern 1011 when the template for vertical column 1 is operative.)
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Chapter 3. MCS·48 Assembly Language Instructions
COLUMN TEMPLATE BITS
The microprocessor scans the keyboard until it detects a low signal (pressed key). This triggers a check loop to ensure no other key has been pressed. When this check has been completed, the processor stores the value of the key. If two keys are pressed, the routine ignores both and starts again at its entry point.
Register and port assignments are as follows:
RO Key counter
Rl Address for key storage R2 Column template R3 Row counter
R4 Intermediate key storage Pl Col umn template output
Chapter 3. MCS-48 Assembly Language Instructions
WAIT: OUTL MOV IN A,P2 A,R2 Pl,A ;WAIT FOR KEY TO BE RELEASED
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CPL A JNZ WAIT
JMP DONE ;DONE WHEN KEY RELEASED SCANKY: MOV RO,#OFH ;KEY COUNTER
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MOV R2,#7FH ;COLUMN TEMPLATE
NEWCOL: MOV R3,#4H ;ROW COUNTER
MOV A,R2 ;PUT TEMPLATE INTO ACC
RL A ;ROTATE TEST BIT INTO POSITION
OUTL Pl,A ;OUTPUT ROTATED TEMPLATE
MOV R2,A ;SAVE ROTATED TEMPLATE
IN A,P2 ;INPUT (KEY PRESSED)
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COLUMN: RRC A ;CHECK INPUT
JC CHECK ;BRANCH IF ROW=l (HIGH)
RET ;RETURN TO MAIN IF ROW=O (LOW)
CHECK: DEC RO ;DECREMENT KEY COUNT
DJNZ R3, COLUMN ;DECREMENT COLUMN COUNT
MOV A,RO ;IF ACCIS NOT ZERO,
JNZ NEWCOL
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SCAN NEXT COLUMN JMP SCANKY ;ST ART NEW SCAN•
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4. UPI-41 ASSEMBLY LANGUAGE INSTRUCTIONS
I n Chapter 1 we described the functional and hardware differences between the MCS-48 and UPI-41 microcomputers. This chapter lists the instruction set differences.
Most of the instructions described in Chapter 3 apply to the U PI-41 microcomputers (8041/8741) also. However, ten MCS-48 instructions are deleted from the UPI-41 instruction set (treated as undefined), two are interpreted differently on the UPI-41, and the UPI-41 instruction set includes four additional instructions for performing the handshaking protocol.
The 8041 A microcomputer executes the full instruction set of the 8041, as well as three new instructions:
Enable DMA (EN DMA), Enable Flags (EN FLAGS), and Move Accumulator Bits 4-7 to Status Register (MOV STS,A). These instructions are described in this chapter under "8041A Added Instructions," and also in Chapter 1 under "8041 A -8041 Microcomputer Differences."
The 8048/41 assemblers normally assume you are using the MCS-48 instruction set. If you wish to use the UPI-41 instruction set, you must first issue the assembler control 'MOD41.' I f you are assembl ing for the 8041 A, you must instead issue the assembler control 'MOD41 A.'