Results and Discussion

First we investigated the IRF response of the NFADs for different temperatures and different excess bias voltages in order to check its agreement with the theoret-ical model. Figure 2.4(a) shows the temporal jitter histogram for a temperature of -130°C, for diode #1 (E2G2). It is indeed clear that there exists two different contributions, where at small time delays the distribution is Gaussian, whilst at longer delays a clear exponential tail is visible.

−500 0 500 1000 1500

−500 0 500 1000 1500 Time delay (ps)

−500 0 500 1000 1500 Time delay (ps)

Figure 2.4: Jitter histograms for NFAD #1 in different conditions. (a) Varying excess bias voltage at a constant temperature of -130^◦C. (b) A constant excess bias voltage of 1 V for different temperatures. (c) A constant bias voltage of 65.5 V for different temperatures.

In order to isolate the two effects, we can exploit their temperature and field de-pendency and we can clearly see that impact ionization is dependent on the excess bias voltage while thermionic emission is dependent on the absolute bias voltage of the NFAD. To confirm this statement, you can look at Figure 2.4(b), where the excess bias is kept constant at different temperatures, and see that the histograms overlap at short delays, meaning the impact ionization process is unaffected. On the other hand, at longer delays, the exponential time-constant is changing sig-nificantly at different temperatures, which is due to varying absolute bias voltage caused by a temperature dependent breakdown voltage in the multiplication re-gion (temperature coefficient is 0.134 V/K). Indeed, if the bias voltage is kept constant for the same temperature range, the contrary is true: the exponential tail is almost unchanged, whilst the Gaussian component changes, as can be seen in Figure 2.4(c).

The temperature dependence of the decay rate (from Fig. 2.4(b)) gives a measure of the energy barrier experienced by the holes [41], which is approximately 0.03 eV at 65.6 V and drops to near zero at around 67 V, leaving the impact ionization as the dominant effect.

To illustrate the overall effects of temperature and excess bias variation, we can plot the FWHM of the jitter histograms. The results obtained with diode #2 are depicted in Figure 2.5a. For a constant temperature, the jitter decreases with increasing excess bias voltage as expected, due to the speed up of the impact ion-ization process [42]. For decreasing temperature and fixed excess bias, it reduces slightly (about 10%) in the range of -50°C to -100°C. This can be explained by the increase of ionization coefficients with lower temperature in the multiplica-tion region [43], which make the avalanche build-up process yet again faster. At temperatures below about -110°C, for low excess bias voltages, one can see the

increase of the jitter due to the significant hole trapping between the absorption and multiplication regions. This effect is clearly negated through the increase of the excess bias, which reduces the energy barrier, as discussed earlier.

Note that for applications, such as QKD, requiring a very high extinction ratio, it is important to consider the jitter width at a lower level than the half-maximum, especially when the jitter histogram shows non-gaussian behaviour. In our case we measured the full-width at 1/100 of the maximum (∆τ1/100) for our devices [17]

and it showed similar temperature behaviour as the FWHM. At the highest excess bias, a ∆τ1/100=200 ps was achieved.

120 100 80 60 for device #2 at differentVex

120 100 80 60

(b) Comparison of the FWHM jitter for four devices at 1 V and 3.5Vex

Figure 2.5: NFADs time jitter versus temperature for different excess bias voltages.

One strategy to reduce the time jitter contribution coming from the hole-trapping phenomena is to use NFADs with a higher breakdown voltage. Figure 2.5b shows the FWHM jitter for all four NFADs tested for the same range of temperatures and two excess bias voltages, 1 V and 3.5 V. At high excess bias, all the detectors have the same behaviour with the minimum jitter being between 52 ps and 67 ps.

However, for low excess bias voltage we see that two of the NFADs do not exhibit the sharp increase in the jitter at low temperatures (devices #3 and #4). This is due to the fact that these diodes have a breakdown voltage of around 5-6 V higher (see Table 2.1) than the diodes which do exhibit the low temperature jitter in-crease, hence the bias voltage remains sufficiently high in order to keep the energy barrier at the heterojunction below zero, preventing hole pile-up.

Note that the difference in breakdown voltage is mainly due to run-to-run fabri-cation variations since the design structure is the same for all the devices.

These results suggest that for optimum operation of the NFAD, the bias voltage

should be sufficiently large in order to avoid the hole pile-up jitter effects, however, it should not be too high, in order to minimize TAT contribution to the DCR. In order to keep the thermally generated DCR well below the 1 cps level, the NFAD should be operated at -130°C. Hence, the optimum breakdown voltage would be around 67 V for this temperature, which would allow operation at any excess bias, without any hole pile-up effects.

Lower jitter for Longer-distance QKD

In QKD the signal-to-noise ratio (SNR) is a crucial characteristic as it defines the maximum transmission distance of the system. In order to maximize the signal, it is preferable to operate at the maximum possible clock rate, which is limited by the jitter of the detectors. This means the signal of a QKD system is proportional to η/∆τ1/100, where η is the detection efficiency and we consider the FW1/100M jitter in order to ensure low error rates. The noise is given by the DCR (r_dc) within the detection time window, hence the SNR = η/(rdc∆τ1/1002). This shows that the timing jitter is the most important characteristic for a long distance QKD system. Given the jitter demonstrated in this work, QKD operation at 5 GHz and an increase of the maximum distance would be possible.