~RDERING NUMBERS:

ftos INTEGRATED CIRCUITS

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ptJAD SO-BIT STATIC SHIFT REGISTER

~." SINGLE VOLTAGE SUPPLY: Vee = 5V ± 5%

~ DC to 3 MHz OPERATION GUARANTEED

• FULLY TTL COMPATIBLE

t ..

FULLY DC OPERATION

the

M142 and M142A are quad 80-bit fully DC shift register constructed on a single chip using very low

~reshold N-channel silicon gate technology which allows high speed (3 MHz guaranteed) and fully TTL Iompatibility without using any external resistor.

~h of the four 80-bit registers.has an independent input, output and recirculate control. The single

iock

line is common to all four registers.

~ansferring data into the register is accomplished when the clock is high (logic "1 ") Shifting of data k:curs when the clock goes low. Output data appears on the negative going edge of the clock.

",en the recirculate line is high, data recirculates, while input is inhibited. When data is entered, the jiK:irculate line is at logic "0".

~put data attain the same logic state that was shifted into the register 80 clocks prior. Available in te-Iead dual in-line plastic or ceramic package.

MISOLUTE MAXIMUM RATlNGS*

Supply voltage

Input voltage on any pin Storage temperature range Operating temperature range

-0.5 to 7 V -0.5 to 7 V

-65 to 150

o

to 70

(.e Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is

~ a stress rating only and functional operation of the device at these or any other condition above those indicate in [.' the "Recommended operating conditions" section of this specification is not implied, Exposure to absolute

maxi-f

mum rating conditions for extended periods may affect device reliability.

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~RDERING

^NUMBERS:

142 B 1 for dual in-line plastic package 142 01 for dual in-line ceramic package 142A B1 for dual in-line plastic package ,142A D1 for dual in-line ceramic package

rsedes issue dated 9/76 69 9fl9

M142 M142A

MECHANICAL DATA (dimensions in mm)

Dual in-line plastic package for M142 D1 and 142A D1

PIN CONNECTIONS

OUTPUT I Vee

~EcrRCUlATE 1 2

"

^{INPUT 4}

INPUT 1 14 RECIRCULATE 4

OUTPUT 2 13 OUTPUT'

REe IRCUlATE 2 5 12 N,C.

INPUT 2 11 CLOCK

OUTPUT] 10 INPUT]

GND 9 RECIRCULATE J

Dual in-line ceramic package for M142 B1 and M142A B1

BLOCK DIAGRAM (one of four shown)

CLOC,,-o---~

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I :

: INPUT I

l OUTPU,J

I I

1 I

: :

!

RECIRCULATE f

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-'TRUTH TABLE

(positive logic) Recircu late

"0"

Parameter Test conditions

V IH

.

Input high voltage VIL

.

Input low voltage

VOH Output high voltage IOH=-1OO IiA

VOL Output low voltage IOL=1.6mA

ILl

.

Input leakage current Vi = Vee Icc Supply current

• These parameters apply to all inputs including clock, . . Typical values at T amb = 25°C and Vee= 5V,

Parameter Test conditions Unit

Min. Typ. Max.

.142 M142A

WAVEFORMS

CLOCK

DATA OUTPUT

RECIRCULATE 1.5V 10"10

tpwl

1.5V

tpwo

//---/ 1.5V

1.5V

\ L ________________ _

5-0644/2

M147

MOS INTEGRATED CIRCUIT

13-BIT LATCH PEDAL SUSTAIN

• PRIORITY OF THE FIRST LEFT PEDAL

• PRIORITY PEDAL FREQUENCY MEMORIZATION

• TRIGGER OUTPUT FOR ENVELOPE CIRCUITS

• CHOICE BETWEEN TWO DIFFERENT INPUT FREQUENCIES (2.00024 MHz or 500.06 kHz)

• ANTI BOUNCE INTERNAL CIRCUIT ON BOTH TOUCH AND RELEASE SITUATION

• STANDARD POLYPHONIC KEYBOARDS

• P-CHANNEL SILICON GATE PROCESS

The M 147 is a monolithic integrated circuit for pedal sustain specifically designed for electronic organs and other musical instruments.

Constructed on a single chip using P-channel Silicon Gate technology it is supplied in a 24-iead dual in line plastic package.

ABSOLUTE MAXIMUM RATINGS*

Source supply voltage Input voltage

Output current (at any pin) Storage temperature Operating temperature

-20 to 0.3 V -20 to 0.3 V 3 mA -65 to 150 °C

o

to 7 0 ° C

* Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other condition above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability .

•• All voltag~ values are referred toVss pin voltage.

ORDERING NUMBER: M 147 B1

MECHANICAL DATA Dimensions in mm

I . I

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~Supersedes i~sue dated 10/76 ₇₃ 9/78

11147

CONNECTION DIAGRAM BLOCK DIAGRAM

11 T2 T1J

DESCRIPTION OF OPERATION

The first negative front, which is obtained by pressing any key, starts a delay circuit whose duration is a the same frequency but with a jump of phase as the internal counters will be reset to zero.

When a pedal is depressed, the corresponding frequency (square wave, 50% of duty cycle) in 5 octaves is present in parallel at the 5 outputs.

These outputs remain when the pedal is released, until a new pedal is depressed. When two or more pedals are depressed, only the left one is accepted (corresponding to the lowest, frequency).

A TP output pulse is present whenever a pedal with priority is depressed. If the pedal is again depressed,

successive TP pulses are generated. .

A pulse appears at the TP output if, when two pedals are depressed, the left one is released.

The TS output is activated only when one or more pedals are depressed. An internal circuit provides bounce suppression on this output.

Note 1: With MODE at Vss and fl== 1 MHz the time is halved (2 to 4 ms)

M147

STATIC ELECTRICAL CHARACTERISTICS (V GG = -16 to -18V, Vss= OV, T_{amb = 0}to 70⁰

e

unless otherwise specified)

Parameter Test conditions Min. Typ. Max. Unit

V 1H Input high voltage Vss-l Vss V

V IL Input low voltage VGG Vss-5 V

RON Output resistance Vo=Vss-1V to Vss 1 1.6 KH

10(011) Output leakage current VI=V IH, Vo=Vss-l0V

T amb = 25°C 10 /lA

IL I nput leakage current VI=Vss-14V T amb = 25°C 10 /lA

IGG Supply current T amb= 25°C 35 45 rnA

DYNAMIC ELECTRICAL CHARACTERISTICS (VGG= -16 to -18V, Vss=OV, T_{amb :;: 0}to 70⁰

e

unless otherwise specified; fl = 2.00024 MHz if MODE input is connected to V GG ; fl = 500.06 kHz if MODE input is connected to V_{ss ).}

Parameter Test conditions Min. Typ. Max. Unit Notes

to Input frequency "1" time 150 ns

tlA Input frequency positive half

period 0.8 1 /lS 1-3

t2A Input frequency negative half

period 0.8 1 /lS 1-3

tlB Input frequency posItive half

period 200 250 ns 2-3

t2B Input frequency negative half

period 200 250 ns 2-3

Ids Delay time of TS 300 1000 ns 3

tdp Delay time of TP 10 /lS 3

tp Width of TP 10 22 ms 3

Notes: 1) With MODE connected to Vss 2) With MODE connected to V GG

3) All these delay and width times are measured at 50% of the swing.

11147

OUTPUT FREQUENCIES (Hz)

Input

TYPICAL APPLICATIONS Typical application circuit

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M147

MOS INTEGRATED CIRCUIT

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