Proof techniques - Enumeration on Trees under Relabelings

Knowledge compilation

To make the proofmodular, we followknowledge compilation:

•

Preprocessing:Compute acircuit representationof the answers

•

Enumeration:Apply ageneric algorithmon the circuit

Tree

First present approachwithout relabelings(as in our ICALP’17 paper) then extend the approach tosupport relabelings

Knowledge compilation

To make the proofmodular, we followknowledge compilation:

•

Preprocessing:Compute acircuit representationof the answers

•

Enumeration:Apply ageneric algorithmon the circuit Tree

First present approachwithout relabelings(as in our ICALP’17 paper) then extend the approach tosupport relabelings

Knowledge compilation

To make the proofmodular, we followknowledge compilation:

•

Preprocessing:Compute acircuit representationof the answers

•

Enumeration:Apply ageneric algorithmon the circuit Tree

First present approachwithout relabelings(as in our ICALP’17 paper) then extend the approach tosupport relabelings

Set circuits

Aset circuitrepresents aset of answersto a queryQ(x,y)

•

^Singleton^x^:⁶^→“the free variablexis mapped to node6”

•

^Tuple^hx^:^4,^y^:⁶ⁱ: tuple of singletons

•

The circuit captures asetof tuples, e.g.,

hx:4,y:6i,hx:4,y:7i

Three kinds ofset-valued gates:

•

Variable gate x:4 :

→ captures hx:4i

•

^{Union gate} ^∪ ^:

→ union of sets of tuples

•

Product gate × :

→ relational product

Set circuits

Aset circuitrepresents aset of answersto a queryQ(x,y)

•

^Singleton^x^:⁶^→“the free variablexis mapped to node6”

•

^Tuple^hx^:^4,^y^:⁶ⁱ: tuple of singletons

•

The circuit captures asetof tuples, e.g.,

hx:4,y:6i,hx:4,y:7i

Three kinds ofset-valued gates:

•

Variable gate x:4 :

→ captures hx:4i

•

^{Union gate} ^∪ ^:

→ union of sets of tuples

•

Product gate × :

→ relational product

Set circuits

Aset circuitrepresents aset of answersto a queryQ(x,y)

•

^Singleton^x^:⁶^→“the free variablexis mapped to node6”

•

^Tuple^hx^:^4,^y^:6i: tuple of singletons

•

The circuit captures asetof tuples, e.g.,

hx:4,y:6i,hx:4,y:7i

Three kinds ofset-valued gates:

•

Variable gate x:4 :

→ captures hx:4i

•

^{Union gate} ^∪ ^:

→ union of sets of tuples

•

Product gate × :

→ relational product

Set circuits

Aset circuitrepresents aset of answersto a queryQ(x,y)

•

^Singleton^x^:⁶^→“the free variablexis mapped to node6”

•

^Tuple^hx^:^4,^y^:6i: tuple of singletons

•

The circuit captures asetof tuples, e.g.,

hx:4,y:6i,hx:4,y:7i

Three kinds ofset-valued gates:

•

Variable gate x:4 :

→ captures hx:4i

•

^{Union gate} ^∪ ^:

→ union of sets of tuples

•

Product gate × :

→ relational product

Set circuits

Aset circuitrepresents aset of answersto a queryQ(x,y)

•

^Singleton^x^:⁶^→“the free variablexis mapped to node6”

•

^Tuple^hx^:^4,^y^:6i: tuple of singletons

•

The circuit captures asetof tuples, e.g.,

hx:4,y:6i,hx:4,y:7i

Three kinds ofset-valued gates:

•

Variable gate x:4 :

→ captures hx:4i

•

^{Union gate} ^∪ ^:

→ union of sets of tuples

•

Product gate × :

→ relational product

Set circuits

Aset circuitrepresents aset of answersto a queryQ(x,y)

•

^Singleton^x^:⁶^→“the free variablexis mapped to node6”

•

^Tuple^hx^:^4,^y^:6i: tuple of singletons

•

The circuit captures asetof tuples, e.g.,

hx:4,y:6i,hx:4,y:7i

Three kinds ofset-valued gates:

•

Variable gate x:4 :

→ captures hx:4i

•

^{Union gate} ^∪ ^:

→ union of sets of tuples

•

Product gate × :

→ relational product

Set circuits

Aset circuitrepresents aset of answersto a queryQ(x,y)

•

^Singleton^x^:⁶^→“the free variablexis mapped to node6”

•

^Tuple^hx^:^4,^y^:6i: tuple of singletons

•

The circuit captures asetof tuples, e.g.,

hx:4,y:6i,hx:4,y:7i

Three kinds ofset-valued gates:

•

Variable gate x:4 :

→ captures hx:4i

•

^{Union gate} ^∪ ^:

→ union of sets of tuples

•

Product gate × :

→ relational product

Set circuits

Aset circuitrepresents aset of answersto a queryQ(x,y)

•

^Singleton^x^:⁶^→“the free variablexis mapped to node6”

•

^Tuple^hx^:^4,^y^:6i: tuple of singletons

•

The circuit captures asetof tuples, e.g.,

hx:4,y:6i,hx:4,y:7i

Three kinds ofset-valued gates:

•

Variable gate x:4 :

→ captures hx:4i

•

^{Union gate} ^∪ ^:

→ union of sets of tuples

•

Product gate × :

→ relational product

Set circuits

Aset circuitrepresents aset of answersto a queryQ(x,y)

•

^Singleton^x^:⁶^→“the free variablexis mapped to node6”

•

^Tuple^hx^:^4,^y^:6i: tuple of singletons

•

The circuit captures asetof tuples, e.g.,

hx:4,y:6i,hx:4,y:7i

Three kinds ofset-valued gates:

•

Variable gate x:4 :

→ captures hx:4i

•

^{Union gate} ^∪ ^:

→ union of sets of tuples

•

Product gate × : relational product

Set circuits

Aset circuitrepresents aset of answersto a queryQ(x,y)

•

^Singleton^x^:⁶^→“the free variablexis mapped to node6”

•

^Tuple^hx^:^4,^y^:6i: tuple of singletons

•

The circuit captures asetof tuples, e.g.,

hx:4,y:6i,hx:4,y:7i

Three kinds ofset-valued gates:

•

Variable gate x:4 :

→ captures hx:4i

•

^{Union gate} ^∪ ^:

→ union of sets of tuples

•

Product gate × :

→ relational product

Set circuits

Aset circuitrepresents aset of answersto a queryQ(x,y)

•

^Singleton^x^:⁶^→“the free variablexis mapped to node6”

•

^Tuple^hx^:^4,^y^:6i: tuple of singletons

•

The circuit captures asetof tuples, e.g.,

hx:4,y:6i,hx:4,y:7i

Three kinds ofset-valued gates:

•

Variable gate x:4 :

→ captures hx:4i

•

^{Union gate} ^∪ ^:

→ union of sets of tuples

•

Product gate × : relational product

Set circuits

Aset circuitrepresents aset of answersto a queryQ(x,y)

•

^Singleton^x^:⁶^→“the free variablexis mapped to node6”

•

^Tuple^hx^:^4,^y^:6i: tuple of singletons

•

The circuit captures asetof tuples, e.g.,

hx:4,y:6i,hx:4,y:7i

Three kinds ofset-valued gates:

•

Variable gate x:4 :

→ captures hx:4i

•

^{Union gate} ^∪ ^:

→ union of sets of tuples

•

Product gate × :

→ relational product

Set circuits

Aset circuitrepresents aset of answersto a queryQ(x,y)

•

^Singleton^x^:⁶^→“the free variablexis mapped to node6”

•

^Tuple^hx^:^4,^y^:6i: tuple of singletons

•

The circuit captures asetof tuples, e.g.,

hx:4,y:6i,hx:4,y:7i

Three kinds ofset-valued gates:

•

Variable gate x:4 :

→ captures hx:4i

•

^{Union gate} ^∪ ^:

→ union of sets of tuples

•

Product gate × : relational product

Preprocessing: Set circuit construction aset circuitcapturing exactly the set ofanswersofQonT:

{hx₁ :n₁, . . . ,x_k:n_ki |(n₁, . . . ,n_k)∈T^k}

•

Proof idea:Translate query tobottom-up tree automaton

and build aprovenance circuitfollowing the structure of the tree

Preprocessing: Set circuit construction aset circuitcapturing exactly the set ofanswersofQonT:

{hx₁ :n₁, . . . ,x_k:n_ki |(n₁, . . . ,n_k)∈T^k}

•

Proof idea:Translate query tobottom-up tree automaton

Enumeration on set circuits

Given a set circuitsatisfying some conditions, we can enumerate all tuples that it captures with linear preprocessing and constant delay E.g., for

hx:4,y:6i,hx:4,y:7i : enumeratehx:4,y:6i, thenhx:4,y:7i

General enumeration approach

→ Enumerate the setT(g)captured by each gateg

→ Do it bytop-down inductionon the circuit

Base case: variable x:n : enumeratehx:niand stop

∪-gate

∪

g₁ g₂

Concatenation:enumerateT(g1) and then enumerateT(g₂)

×-gate

g1 g2

Lexicographic product: for everyt₁inT(g₁):

for everyt2 inT(g2): outputt₁+t₂

General enumeration approach

→ Enumerate the setT(g)captured by each gateg

→ Do it bytop-down inductionon the circuit Base case: variable x:n :

enumeratehx:niand stop

∪-gate

∪

g₁ g₂

Concatenation:enumerateT(g1) and then enumerateT(g₂)

×-gate

g1 g2

Lexicographic product: for everyt₁inT(g₁):

for everyt2 inT(g2): outputt₁+t₂

General enumeration approach

→ Enumerate the setT(g)captured by each gateg

→ Do it bytop-down inductionon the circuit

Base case: variable x:n : enumeratehx:niand stop

∪-gate

∪

g₁ g₂

Concatenation:enumerateT(g1) and then enumerateT(g₂)

×-gate

g1 g2

Lexicographic product: for everyt₁inT(g₁):

for everyt2 inT(g2): outputt₁+t₂

General enumeration approach

→ Enumerate the setT(g)captured by each gateg

→ Do it bytop-down inductionon the circuit

Base case: variable x:n : enumeratehx:niand stop

∪-gate

∪

g₁ g₂

Concatenation:enumerateT(g₁) and then enumerateT(g₂)

×-gate

g1 g2

Lexicographic product: for everyt₁inT(g₁):

for everyt2 inT(g2): outputt₁+t₂

General enumeration approach

→ Enumerate the setT(g)captured by each gateg

→ Do it bytop-down inductionon the circuit

Base case: variable x:n : enumeratehx:niand stop

∪-gate

∪

g₁ g₂

Concatenation:enumerateT(g₁) and then enumerateT(g₂)

×-gate

g1 g2

Lexicographic product:

for everyt₁inT(g₁): for everyt2 inT(g2):

outputt₁+t₂

Circuit conditions

Enumeration relies on someconditionson the input circuit (d-DNNF):

•

^∪ ^{are all}deterministic:

For any two inputsg1andg2of a∪-gate, the captured setsT(g₁)andT(g₂)aredisjoint (they have no tuple in common)

→ Avoidsduplicate tuples

•

^× ^{are all}decomposable:

For any two inputsg₁andg₂of a×-gate, no variable has a path to bothg₁ andg₂

→ Avoidsduplicate singletons

x:4

y:6

∪

y:7

•

Also an additionalupwards-determinismcondition

Circuit conditions

Enumeration relies on someconditionson the input circuit (d-DNNF):

•

^∪ ^{are all}deterministic:

For any two inputsg1andg2of a∪-gate, the captured setsT(g₁)andT(g₂)aredisjoint (they have no tuple in common)

→ Avoidsduplicate tuples

•

^× ^{are all}decomposable:

For any two inputsg₁andg₂of a×-gate, no variable has a path to bothg₁ andg₂

→ Avoidsduplicate singletons

x:4

y:6

∪

y:7

•

Also an additionalupwards-determinismcondition

Circuit conditions

Enumeration relies on someconditionson the input circuit (d-DNNF):

•

^∪ ^{are all}deterministic:

For any two inputsg1andg2of a∪-gate, the captured setsT(g₁)andT(g₂)aredisjoint (they have no tuple in common)

→ Avoidsduplicate tuples

•

^× ^{are all}decomposable:

For any two inputsg₁andg₂of a×-gate, no variable has a path to bothg₁ andg₂

→ Avoidsduplicate singletons

x:4

y:6

∪

y:7

•

Also an additionalupwards-determinismcondition

Circuit conditions

Enumeration relies on someconditionson the input circuit (d-DNNF):

•

^∪ ^{are all}deterministic:

For any two inputsg1andg2of a∪-gate, the captured setsT(g₁)andT(g₂)aredisjoint (they have no tuple in common)

→ Avoidsduplicate tuples

•

^× ^{are all}decomposable:

For any two inputsg₁andg₂of a×-gate, no variable has a path to bothg₁ andg₂

→ Avoidsduplicate singletons

x:4

y:6

∪

y:7

•

Enumeration subtleties

•

We must not waste time in gates capturing∅

→ Labelthem during the preprocessing

•

We must not waste time because of gates capturing hi

→ Homogenizationto set them aside

•

We must not waste time inhierarchies of∪-gates

→ Precompute areachability index(usesupwards-determinism)

Enumeration subtleties

•

We must not waste time in gates capturing∅

→ Labelthem during the preprocessing

•

We must not waste time because of gates capturing hi

→ Homogenizationto set them aside

•

We must not waste time inhierarchies of∪-gates

→ Precompute areachability index(usesupwards-determinism)

Enumeration subtleties

•

We must not waste time in gates capturing∅

→ Labelthem during the preprocessing

•

We must not waste time because of gates capturing hi

→ Homogenizationto set them aside

•

We must not waste time inhierarchies of∪-gates

→ Precompute areachability index(usesupwards-determinism)

Enumeration subtleties

•

We must not waste time in gates capturing∅

→ Labelthem during the preprocessing

•

We must not waste time because of gates capturing hi

→ Homogenizationto set them aside

•

We must not waste time inhierarchies of∪-gates

→ Precompute areachability index(usesupwards-determinism)

Enumeration subtleties

•

We must not waste time in gates capturing∅

→ Labelthem during the preprocessing

•

We must not waste time because of gates capturing hi

→ Homogenizationto set them aside

•

We must not waste time inhierarchies of∪-gates

→ Precompute areachability index(usesupwards-determinism)

Enumeration subtleties

•

We must not waste time in gates capturing∅

→ Labelthem during the preprocessing

•

We must not waste time because of gates capturing hi

→ Homogenizationto set them aside

•

We must not waste time inhierarchies of∪-gates

→ Precompute areachability index(usesupwards-determinism)

Hybrid circuits to support relabelings

To supportrelabelings, we usehybrid circuitsthat have:

•

Boolean gatesthat depend only on thelabeling

•

^{Set gates}that capture a set of tuples foreach labeling

Four kinds ofBoolean gates:

•

Variable gate h2:4 :

→ true iff node 4 is labeledh2

•

AND, OR, NOT ∧ ∨ ¬ :

→ usual semantics One newset-valued gate:

•

^: ^{Test gate}

→ ∅if Boolean input is false

→ like the set input otherwise

Hybrid circuits to support relabelings

To supportrelabelings, we usehybrid circuitsthat have:

•

Boolean gatesthat depend only on thelabeling

•

^{Set gates}that capture a set of tuples foreach labeling

h2:4 ×

hx:4i

∪

Four kinds ofBoolean gates:

•

Variable gate h2:4 :

→ true iff node 4 is labeledh2

•

AND, OR, NOT ∧ ∨ ¬ :

→ usual semantics One newset-valued gate:

•

^: ^{Test gate}

→ ∅if Boolean input is false

→ like the set input otherwise

Hybrid circuits to support relabelings

To supportrelabelings, we usehybrid circuitsthat have:

•

Boolean gatesthat depend only on thelabeling

•

^{Set gates}that capture a set of tuples foreach labeling

Four kinds ofBoolean gates:

•

Variable gate h2:4 :

→ true iff node 4 is labeledh2

•

AND, OR, NOT ∧ ∨ ¬ :

→ usual semantics One newset-valued gate:

•

^: ^{Test gate}

→ ∅if Boolean input is false

→ like the set input otherwise

Hybrid circuits to support relabelings

To supportrelabelings, we usehybrid circuitsthat have:

•

Boolean gatesthat depend only on thelabeling

•

^{Set gates}that capture a set of tuples foreach labeling

h2:4 ×

hx:4i

∪

Four kinds ofBoolean gates:

•

Variable gate h2:4 :

→ true iff node 4 is labeledh2

•

AND, OR, NOT ∧ ∨ ¬ :

→ usual semantics

One newset-valued gate:

•

^: ^{Test gate}

→ ∅if Boolean input is false

→ like the set input otherwise

Hybrid circuits to support relabelings

To supportrelabelings, we usehybrid circuitsthat have:

•

Boolean gatesthat depend only on thelabeling

•

^{Set gates}that capture a set of tuples foreach labeling

Four kinds ofBoolean gates:

•

Variable gate h2:4 :

→ true iff node 4 is labeledh2

•

AND, OR, NOT ∧ ∨ ¬ :

→ usual semantics One newset-valued gate:

•

^: ^{Test gate}

→ ∅if Boolean input is false

→ like the set input otherwise

Hybrid circuit semantics

•

^{For every}^labeling, the hybrid circuit captures aset of tuples

→ Here, the captured set is

hx:4,y:6i,hx:4,y:7i

•

When the tree isrelabeled, change theBoolean variables

→ New captured set:

Hybrid circuit semantics

•

^{For every}^labeling, the hybrid circuit captures aset of tuples

→ Here, the captured set is

hx:4,y:6i,hx:4,y:7i

•

When the tree isrelabeled, change theBoolean variables

→ New captured set:

Hybrid circuit semantics

•

^{For every}^labeling, the hybrid circuit captures aset of tuples

→ Here, the captured set is

hx:4,y:6i,hx:4,y:7i

•

When the tree isrelabeled, change theBoolean variables

→ New captured set:

Hybrid circuit semantics

•

^{For every}^labeling, the hybrid circuit captures aset of tuples

→ Here, the captured set is

hx:4,y:6i,hx:4,y:7i

•

When the tree isrelabeled, change theBoolean variables

→ New captured set:

Hybrid circuit semantics

•

^{For every}^labeling, the hybrid circuit captures aset of tuples

→ Here, the captured set is

hx:4,y:6i,hx:4,y:7i

•

When the tree isrelabeled, change theBoolean variables

→ New captured set:

Hybrid circuit semantics

•

^{For every}^labeling, the hybrid circuit captures aset of tuples

→ Here, the captured set is

hx:4,y:6i,hx:4,y:7i

•

When the tree isrelabeled, change theBoolean variables

→ New captured set:

Hybrid circuit semantics

•

^{For every}^labeling, the hybrid circuit captures aset of tuples

→ Here, the captured set is

hx:4,y:6i,hx:4,y:7i

•

When the tree isrelabeled, change theBoolean variables

→ New captured set:

Hybrid circuit semantics

•

^{For every}^labeling, the hybrid circuit captures aset of tuples

→ Here, the captured set is

hx:4,y:6i,hx:4,y:7i

•

When the tree isrelabeled, change theBoolean variables

→ New captured set:

Hybrid circuit semantics

•

^{For every}^labeling, the hybrid circuit captures aset of tuples

→ Here, the captured set is

hx:4,y:6i,hx:4,y:7i

•

When the tree isrelabeled, change theBoolean variables

→ New captured set:

Hybrid circuit semantics

•

^{For every}^labeling, the hybrid circuit captures aset of tuples

→ Here, the captured set is

hx:4,y:6i,hx:4,y:7i

•

When the tree isrelabeled, change theBoolean variables

→ New captured set:

Hybrid circuit semantics

•

^{For every}^labeling, the hybrid circuit captures aset of tuples

→ Here, the captured set is

hx:4,y:6i,hx:4,y:7i

•

When the tree isrelabeled, change theBoolean variables

→ New captured set:

Hybrid circuit semantics

•

^{For every}^labeling, the hybrid circuit captures aset of tuples

→ Here, the captured set is

hx:4,y:6i,hx:4,y:7i

•

When the tree isrelabeled, change theBoolean variables

→ New captured set:

Complexity of relabelings

•

When a labelchanges, update the circuitbottom-up

•

The circuit follows the structure of theinput treeT so updates are inO(height(T))

→ Balancing lemma:Rewrite theinput treeto make itbalanced

h2:4 ×

hx:4i

∪

Complexity of relabelings

•

When a labelchanges, update the circuitbottom-up

•

The circuit follows the structure of theinput treeT so updates are inO(height(T))

→ Balancing lemma:Rewrite theinput treeto make itbalanced

h2:4 ×

hx:4i

∪

img:6 hy:6i img:7 hy:7i

Complexity of relabelings

•

When a labelchanges, update the circuitbottom-up

•

The circuit follows the structure of theinput treeT so updates are inO(height(T))

→ Balancing lemma:Rewrite theinput treeto make itbalanced

h2:4 ×

hx:4i

∪

Complexity of relabelings

•

When a labelchanges, update the circuitbottom-up

•

The circuit follows the structure of theinput treeT so updates are inO(height(T))

→ Balancing lemma:Rewrite theinput treeto make itbalanced

h2:4 ×

hx:4i

∪

img:6 hy:6i img:7 hy:7i

Complexity of relabelings

•

When a labelchanges, update the circuitbottom-up

•

The circuit follows the structure of theinput treeT so updates are inO(height(T))

→ Balancing lemma:Rewrite theinput treeto make itbalanced

h2:4 ×

hx:4i

∪

Conclusion

Summary and future work Summary:

•

^Problem:enumerate the answers of anMSO queryon atree with efficient support forrelabeling updateson the tree

•

Main result:we can do this withlinearpreprocessing, constantdelay between each answer, andlogupdate time

•

Consequences:group-by, parameterized queries, aggregation Future work:

•

^Practice:implement the technique withautomata

•

Applications:text extraction? e.g.,document spanners(ongoing)

•

^Updates:support insertions/deletions? (ongoing)

Thanks for your attention!

Summary and future work Summary:

•

^Problem:enumerate the answers of anMSO queryon atree with efficient support forrelabeling updateson the tree

•

Main result:we can do this withlinearpreprocessing, constantdelay between each answer, andlogupdate time

•

Consequences:group-by, parameterized queries, aggregation Future work:

•

^Practice:implement the technique withautomata

•

Applications:text extraction? e.g.,document spanners(ongoing)

•

^Updates:support insertions/deletions? (ongoing)

Thanks for your attention!

Summary and future work Summary:

•

^Problem:enumerate the answers of anMSO queryon atree with efficient support forrelabeling updateson the tree

•

Main result:we can do this withlinearpreprocessing, constantdelay between each answer, andlogupdate time

•

Consequences:group-by, parameterized queries, aggregation

Future work:

•

^Practice:implement the technique withautomata

•

Applications:text extraction? e.g.,document spanners(ongoing)

•

^Updates:support insertions/deletions? (ongoing)

Thanks for your attention!

Summary and future work Summary:

•

^Problem:enumerate the answers of anMSO queryon atree with efficient support forrelabeling updateson the tree

•

Main result:we can do this withlinearpreprocessing, constantdelay between each answer, andlogupdate time

•

Consequences:group-by, parameterized queries, aggregation Future work:

•

^Practice:implement the technique withautomata

•

Applications:text extraction? e.g.,document spanners(ongoing)

•

^Updates:support insertions/deletions? (ongoing)

Thanks for your attention!

Summary and future work Summary:

•

^Problem:enumerate the answers of anMSO queryon atree with efficient support forrelabeling updateson the tree

•

Main result:we can do this withlinearpreprocessing, constantdelay between each answer, andlogupdate time

•

Consequences:group-by, parameterized queries, aggregation Future work:

•

^Practice:implement the technique withautomata

•

Applications:text extraction? e.g.,document spanners(ongoing)

•

^Updates:support insertions/deletions? (ongoing)

Thanks for your attention!

References i

Bagan, G. (2006).

MSO queries on tree decomposable structures are computable with linear delay.

InCSL.

Kazana, W. and Segoufin, L. (2013).

Enumeration of monadic second-order queries on trees.

TOCL, 14(4).

Losemann, K. and Martens, W. (2014).

MSO queries on trees: enumerating answers under updates.

InCSL-LICS.

References ii

Niewerth, M. and Segoufin, L. (2018).

Enumeration of MSO queries on strings with constant delay and logarithmic updates.

InPODS. To appear.

Set circuit construction

•

^Automaton:“Select all node pairs(x,y)”

•

^States:^{∅,^x,^y,^xy}

x:n

∪ ∪ ∪ ∪

∅ x y xy

∪ ∪ ∪ ∪

∅ x y xy

∪ ∪ ∪ ∪

∅ x y xy

Set circuit construction

•

^Automaton:“Select all node pairs(x,y)”

•

^States:^{∅,^x,^y,^xy}

x:n

∪ ∪ ∪ ∪

∅ x y xy

∪ ∪ ∪ ∪

∅ x y xy

∪ ∪ ∪ ∪

∅ x y xy

Set circuit construction

•

^Automaton:“Select all node pairs(x,y)”

•

^States:^{∅,^x,^y,^xy}

x:n

∪ ∪ ∪ ∪

∅ x y xy

∪ ∪ ∪ ∪

∅ x y xy

∪ ∪ ∪ ∪

∅ x y xy

Set circuit construction

•

^Automaton:“Select all node pairs(x,y)”

•

^States:^{∅,^x,^y,^xy}

x:n

∪ ∪ ∪ ∪

∅ x y xy

∪ ∪ ∪ ∪

∅ x y xy

∪ ∪ ∪ ∪

∅ x y xy

Set circuit construction

•

^Automaton:“Select all node pairs(x,y)”

•

^States:^{∅,^x,^y,^xy}

x:n

∪ ∪ ∪ ∪

∅ x y xy

∪ ∪ ∪ ∪

∅ x y xy

∪ ∪ ∪ ∪

∅ x y xy

Set circuit construction

•

^Automaton:“Select all node pairs(x,y)”

•

^States:^{∅,^x,^y,^xy}

x:n

∪ ∪ ∪ ∪

∅ x y xy

∪ ∪ ∪ ∪

∅ x y xy

∪ ∪ ∪ ∪

∅ x y xy

Set circuit construction

•

^Automaton:“Select all node pairs(x,y)”

•

^States:^{∅,^x,^y,^xy}

x:n

∪ ∪ ∪ ∪

∅ x y xy

∪ ∪ ∪ ∪

∅ x y xy

∪ ∪ ∪ ∪

∅ x y xy

Dans le document Enumeration on Trees under Relabelings (Page 49-120)