• Aucun résultat trouvé

DC OPERATING CONDITIONS AND CHARACTERISTICS (Full operating voltage and temperature range unless otherwise noted.)

Dans le document MOTOROLA )lIALITY' (Page 24-31)

RECOMMENDED OPERATING CONDITIONS IReferenced to VSS" Ground I

Parameter Symbol Min Typ Ma. Unit Notes

Average VOO Power Supply Current IDDl

Vee Power Supply Current ICC

Average Vas Power Supply Current ISS

Standby VOO Power Supply Current IDD2

Average VOO Power Supply Current during IDD3

"RAS only" cycles

Operation at higher cycle rates with reduced ambient temperatures and higher power disSipation IS permiSSible prOVided that all ac parameters are met.

2. All voltages referenced to VSS.

3. Output voltage Will swing from VSS to VCC when enabled, with no output load. F or purposes of maintain 109 data 10 standby mode, VCC may be reduced to VSS without affecting refresh operations or data retention. However, the VOH(mlnl specifica·

tion is not guaranteed in thiS mode.

4. Device speed IS not guaranteed at input voltages greater than TTL levels (0 to 5 v).

5. Several cycles are requ Ired after power-up before proper device operation is achieved. Any 8 cycles which perform refresh are adequate for this purpose.

Min Typ Ma. Units Notes measurement of thiS parameter.

10.0V" VO u, " +10V.

11. Effective capacitance is calculated from the equation:

c

==-6.0 with 6.V = 3 volts.

t;V

EFFECTIVE CAPACITANCE (Full operating voltage and temperature range, periodically sampled rather than 100% tested) Note 11

Characteristic Symbof Ma. Unit

Input Capacitance lAO-AS). D;n. CS C;nIEFF) 5.0 pF

RAS, CAS, WRITE 10.0

Output Capacitance CoutIEFF) 7.0 pF

ABSOLUTE MAXIMUM RATINGS (See Notes 1 and 2) ARE EXCEEDED. Functional operation should be restricted to RECOMMENDED voltages to tt-:IS high Impedance C!fCUlt OPERATING CONDITIONS. Exposure to higher than recommended voltages

for e)(tended periods of time could affect deVice reliability. VSS must be applied prior to Vec and VOO. VBS must also be the last power supply switched off.

AC OPERATING CONDITIONS AND CHARACTERISTICS (Read, Write, and Read-Modify-WriteCycles)

RECOMMENDED AC OPERATING CONDITIONS

IVDD"'2 v' '0%, vee' 5.0 v' '0%,

'JBB

-5.0 v, '0%, VSS a V, TA "0

to

700e)

Notes " 5, '2,'B

MCM.a27AC' MCM.a27AC2 MCM.a27AC3 MCM.a27AC4

P.rlmeter Symbol Min M •• Column Address Strobe Hold Time 'CSH 120 Row to Column Strobe Lead Time 'ReO 15 40

14.Assumes that tACO"'; tRCO(max).

15. Assumes that tRCD ~ tACO (max).

16. Measured With a !oad CirCUit equivalent to 2 TTL loads and 100 pF,

17.0peration within the tRCO(msx) limit Insures that tRAc(max) can be met. tRCO(max) is specified as a reference point only~ If tRCD is greater than the specified tRco(max) limit, then access time is controlled exclusively by tCAC'

Min M •• Min M •• Min M .. Unit. Not .. or read-modify write cycles.

20. twcs, tewD, and tAWD are not restrictive operating 'the condition of Data Out (at access time) is indeterminate.

MCM4027A

READ CYCLE TIMING

AAS V1HC

V IL

CAS VIHC

V,L

ADDRESSES V,H

V'C

Dout

1+

1

,1---;

i--- i--- i--- i--- i--- i--- 1 ' 1

tAAS

"'-'AA .. -

----I

'AC

-. ---+1

,

IRSH----~----.. :

i / ' - - - + - - - t - - - . J i •

j

i I tCSH

.r----

t A P i

I f.-.. ---

tRCO---· .. ---tCAS ---.-~ 14---- tCAP

---1

:;

'--_+--_ _ _

---.JI Yr

I II

1 'ACS-j.--.j

! -.-J,

A C H

1----WRITE CYCLE TIMING

AAS

ADDRESSES

r

--1

:

~-~--.-.

tAR

VI~~---'~~

__________________________________

-J~

! ~---t R-C-D---:-;t+~-"'C:; .. ~;;f<<-. :;=:::~:-'-~R~:~SH. -~-~:.

tet: :

V

~~~ ---ir-1i---'---~~~

______________

~/..-'

-~

i

tAAH

tAsA---k--·...i~· -.~ lAse--;'..., ;"tCAH'"

~',: ~ A:d~;" ~ ;~~,:s~

~~«~'---IWCS i _________ ;... tWCH...j .... "twp . .

V~H,~.~::>.L::..A-""_L-

;,.L.'

Lj<'~,----",--+-I ---t-r-_---4--"m~~~,~'I_L:~.A..-~~~,.

L.- . ! '

tWCR'

r--.... -- --- , ...

-tOHA----;--·

..- tRWL -

..,

;

: tcsc--r

f4--tCH

-i

cs V~~L"'-"'~:-Jr1i.~, ~~.---.:7":~,\' t'~<>z</ijh~~

..

tCHR

....

tCAG

.,

lOF f.- -+--.; ... - I OOH

-VOH

)

VALID

Dout Open

DATA

VOL

,

j4 tRAG

MCM4027A

READ-MODIFY-WRITE TIMING

AAS

ADDRESSES

WRITE

cs

°out V,HC

V,L

r----·---'AR

.,

I

--- t Awe --.-.---tAAS ._...

-I _ _ -++-_ _ '_RC_O-[-- - -+1

--V1HC

----XI

V,L

f---+---~

V,HC V,L

V,H V,L

I r

!l----.tRwD

--..j ...

-tcwL

!

I

I

tACS' ~ f4--- .. _-tCWD----

---r---tAWL----1

22~~~__r"---~1

!

~---i: '

+ - - - l C H R

'ese -

-..I

1+ te

H j ! I

!

r- 'wp--l

I, I'

----. tCAG

---...!+--'b6H---..

i :

I

RAS ONL Y REFRESH TIMING

ADDRESSES

°out

V,HC V,L

tAAS-tRAH

--1

tRe

---- --.j

---, I

Ir---~

I tRP

---.I

VV',HL=====1_tASAROW ~~---Ad-d-,e-,,-~

.I ~

VOH

VOL

-PAGE MOOE REAO CYCLE

~---tRAS---RAS

VIHC-V'L

-C-AS ViHC

-V,L

VIH

-Addresses VIL -=Y"'CC:C:=V'1L-=:1'1..C>=="""~Y

DOut

Write

PAGE MOOE WRITE CYCLE

RAS

CAS

VIH Addresses V JL

-cOs

DOUT

Wnte

D,n

Row Addresses Columns

s:

., 16.384-BIT DYNAMIC RANDOM ACCESS MEMORY

The MCM4116B is a 16.384-bit. high-speed dynamic Random

,

Access Memory designed for high-performance. low-cost applications in mainframe and buffer memories and peripheral storage. OrganIZed as 16.384 one-bit words and fabricated using Motorola's highly reliable N-channel double-polysilicon technology.

this device optimizes speed. power. and density tradeoffs.

By multiplexing row and column address inputs. the MCM4116B requires only seven address Itnes and permits packaging in Motorola's standard 16-pm dual in-line packages. This packaging technique allows high system density and is compatible with widely available automated test and insertion equipment. Complete address decoding IS done on chip with address latches incorporated.

All inputs are TIL compatible. and the output is 3-state TIL compatible. The data output of the MCM4116B is controlled by the column address strobe and remains valid from access time until the column address strobe returns to the high state. This·output scheme allows higher degrees of system design flexibility such as common input/output operation and two dimensional memory selection by decoding both row address and column address strobes.

The MCM411 6B mcorporates a one-transistor cell design and dynamic storage techniques. with each of the 128 row addresses requiring a refresh cycle every 2 milliseconds.

Flexible Timmg with Read-Moaify-Write. RAS·Only Refresh. and Page-Mode Capability

Industry Standard 16-Pin Package

• 16.384 X 1 OrganIZation

• ±10% Tolerance on All Power Supplies

• All Inputs are Fully TIL Compatible

• Three·State Fully TIL-Compatible Output

• Common 1/0 Capability When Using "Early Write" Mode

• On-Chip Latches for Addresses and Data In

• Low Power Dissipation - 463 mW Active. 20 mW Standby(Max)

• Fast Access Time Options:150 ns - MCM4116BP-15. BC-15 200 ns - MCM4116BP-20. BC-20 250 ns - MCM4116BP-25. BC-25 300 ns - MCM4116BP-30. BC-30

Easy Upgrade from 16-Pin 4K RAMs ABSOLUTE MAXIMUM RATINGS ISee Notel

Rating Symbol Value Unit

NOTE Permanent deVice damage may occur if ABSOLUTE MAXIMUM RATINGS c:re ex-ceeded. Functional operation should be restncted to RECOMMENDED OPERAT-ING CONDITIONS. Exposure to higher than recommended voltages for extended periods of time could a1fect device reliability

MOS

FRIT-SEAL CERAMIC PACKAGE

CASE 620 voltages to this high Impedance cirCUit.

Dans le document MOTOROLA )lIALITY' (Page 24-31)

Documents relatifs