FEATURES
0 Replacement for popular 2708 type EPROM 0 Static operation - no clocks required
0 Low power dissipation - less than 450 mW in READ mode
0 450ns maximum access time DESCRIPTION
The MK 2708 is a 1024 x 8 bit Electrically Program-mable/Ultraviolet Erasable Read Only Memory. The circuit is fabricated with MOSTEK's advanced N-channel silicon gate technology for the highest per-formance and reliability. The MK 2708 offers signifi-cant advantages over hardwired logic in cost, system flexibility, turnaround time and performance.
System oriented features include direct interfacing capability with TTL during both the READ and PROG RAM modes. The three state outputs provide
"0 R" tie capabil i1;Y for construction of larger arrays.
Power requirements include +12V, +5V and -5V supplies. Power dissipation has been reduced to less than 450 mW. Complete programming and functional testing on all 8192 bit locations is performed prior to shipment to insure 100% programmability.
The MK 2708 is packaged in the industry standard 24 pin dual-in-line (DIP) package with a transparent hermetically sealed lid. This allows the user to expose the chip to ultraviolet light to erase the data pattern.
0 Inputs and outputs TTL compatible 0 Standard supplies +12V,±5V
0 Three state output "OR" tie capability 0 Standard 24 pin DIP with transparent lid
following the programming procedures outlined in th is data sheet.
The MK 2708 is specifically designed to fit those applications where fast turnaround time and pattern experimentation are required. The 8 bit wide parallel output of the M K 2708 makes it ideally su ited for reduction in the possibility of error when converting data to other forms (cards, tape, etc.) for this
ABSOLUTE MAXIMUM RATINGS*
Operating temperature T A (Ambient) ... O°C to + 70°C Storage temperature T A (Ambient) ... -65°C to + 125°C VOO with respect to VSS ... -.3V to +20V VCC and VSS with respect to VSS ... -.3V to +15V All input or outputs with respect
to VSS during read ... -.3V to +15V CS/WE input with respect to VSS during
programming ... -.3V to +20V PRO'GRAM input with respect to VSS ... -.3V to +35V Power dissipation ... 1W READ OPERATION
Recommended DC Operating Conditions (O°C<:TA<: 70°C)
PARAMETER MIN TYP MAX
VOO Supply Voltage 11.4 12.0 12.6
VCC Supply Voltage 4.75 5.0 5.25
VSS Supply Voltage -4.75 -5.0 -5.25
VSS Supply Voltage 0 0 0
VIL Logic '0' Voltage All Inputs VSS 0.65 VIH Logic '1' Voltage All Inputs 3.0 VCC + 1
DC Electrical Characteristics
'Stresses above those listed under
"Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or at any other conditions above those indio cated in the operational sections of this specification is not implied. Expo-sure to Absolute Maximum Rating con-ditions for extended periods may affect device reliability.
UNITS NOTES
Volts 1
Volts 1
Volts 1
Volts 1
Volts 1
Volts 1
(O°C<:TA<: 70° C) (VOD = + 12V ±5%, VCC = + 5V± 5%, VSB = -5V± 5%, VSS = OV)
PARAMETER MIN TYP MAX UNITS NOTES
100 VOO Power Supply Current 20 mA 2
ICC Vee Power Supply Current 10 mA 2
ISS VBB Power Supply Current 24 mA 2
VOL Output Low Level (Logic '0') lOUT = 3.2mA
0040 Volts VOH1 Output High Level (Logic '1')
IOUT= -100j.lA 3.7 Volts
VOH2 Output High Level (Logic '1') 2.4 Volts
lOUT = -1mA
II(L) Input Leakage Current -10 10 J.l.A 3
IO(L) Output Leakage Current , -10 10 j.lA 4
NOTES:
1. All voltages referenced to VSS
2. Power supply currents are specified under worst case conditions on over temperature range of 0° C to +70° C.
CS/WE ~ OV or +5V 3. VIN ~ 0 to 5.25V
4. VOUT ~ 5.25V,
CS
~ 5 volts5. Load conditions ~ 1 TTL load and 100pF
III - 49
AC Electrical Characteristics (5)
(00 C <TA<70°C) (VDD = + 12V±5%, VCC = + 5V±5%, VSS = -5V± 5%, VSS = OV)
PARAMETER MIN
tACC Access Time Referenced to Address Valid
tco Chip Select to Output Delay tDF Chip Deselect to Output Open 0 tOH
Capacitance (TA = 25' C)
CIN COUT
Output Hold Time
PARAMETER Input Capacitance Output Capacitance
READ OPERATION TIMING DIAGRAM
VI H -
--+----...
CS
VIL-0
MIN
VALID
tco1
TYP MAX UNITS NOTES
450 ns 5
250 ns 5
250 ns 5
ns 5
TYP MAX UNITS NOTES
4 6 pF
8 12 pF
DATA VOL_~T777,,~rT77,,~,,~ .i---~
VALID
OUT VOH ---'-''-'-L..J..L..L..t....I. ... L..J..L..LJ...i....L....(.J
-,::...---.J1
PROGRAMMING OPERATION PROGRAMMING INSTRUCTIONS
Operation in the Program Mode
The MK 2708 as shipped from MOSTEK will be completely erased. In this initial state and after any subsequent erasure, all bits will be at a '1' level (output high). Information is introduced by selec-tively programming 'O's in to the proper bit locations.
Once a '0' has been programmed into the chip it may be changed only by erasing the entire chip with UV light.
Word address selection is done by the same decode circuitry used in the read mode. The circuit is put into the programming mode by maintaining the CS/WE input at +12V. I n this mode the output pins serve as inputs (8 bits in parallel) for the required
program data. Logic levels for other inputs and the supply voltages are the same qS in the read mode.
Once address set-up and data set-up times have been met, one program pulse per address is applied to the program input. Each of 1024 address locations are programmed sequencially in this manner. One cycle thru all 1024 addresses constitutes a loop. The number of required loops (N) is a function of program pulse width according to the following equation:
N x tpw;;' 100 ms
This implies that the number of loops (N) range from a minimum of 100 (tpw
=
1 ms) to 1000 (tpw = .1 mS).III - 50
Recommended DC Operating Conditions (TA = 25°C)
PARAMETER
VDD Supply Voltage
VCC Supply Voltage
VBB Supply Voltage
VSS Supply Voltage
Vil I nput logic '0' level Except PROGRAM
VIH I nput logic '1' level (Addresses and Data) VIHW CS/WE Input High level VIHP PROGRAM Pulse Input High Level VllP PROGRAM Pulse Input Low Level
DC Electrical Characteristics
MIN
II(l) Input leakage Current 10
IIPl PROGRAM Pulse Source Current TBD
IIPH PROGRAM Pulse Sink Current TBD
NOTES:
1. All voltages are referenced to VSS.
2. Programming mode only.
UNITS
AC Electrical Characteristics
(TA
=
25°C) (VDD=
+12V±5%, VCC=
+5V±5%, VBB=
-5V± 5%, VSS=
OV)PARAMETER MIN MAX UNITS NOTES
tAS Address Set-Up Time 10 MS
tcss CS/WE Set-Up Time 10 MS
tDS Data Set-Up Time 10 MS
tAH Address Hold Time 1 MS
tCH CS/WE Hold Time .5 MS
tDH Data Hold Time 1 MS
tDF Chip Deselect to Output Off
0 250 MS
tDPR Program to Read Delay 10 MS
tpw Program Pulse Width .1 1.0 ms
tPR Program Pulse Rise Time .5 2.0 MS
tPF Program Pulse Fall Time .5 2.0 MS
TIMING DIAGRAM
..
, OF N PROGRAM---I~*~ .. __ --:
READ~
LOOPS (AFTER N )
, . . - - - f \
PROG. LOOPS CS/WEVIHW-
VIL-ADDRESSES V'H-V,L_
DATA V,H_
V,L-
VIHP-PROGRAM PULSE
NOTE:
- i A H •
-1t~
vN,;.,O,;.,T..;;;E-,-' _ _ _ _ _ _~R~O I I
--ItDH
VALID
The CS/WE transition must occur after the program pulse transition and before the address transition.
III - 52
MK 2708 Erasing Procedure
The MK 2708 may be erased by exposure to high intensity ultraviolet light, illuminating the chip thru the transparent window. This exposure to ultraviolet light induces the flow of a photo current from the floating gate to the substrate, thereby discharging the gate oto its initial state. An ultraviolet source of 2537A yielding a total integrated dosage of 10 Watt-seconds/cm 2 is required. Note that all bits of MK 2708 will be erased.
An example of an ultraviolet light source which can erase the MK 2708 in 10 to 20 minutes is the Model
III
-5-52 short wave ultraviolet lamps manufactured by Ultra-Violet Products, Inc. (5114 Walnut Grove Avenue, San Gabriel, California). The lamp should be used without short wave filters, and the MK 2708 to be erased should be placed about one inch away from the lamp tubes. It should be noted that as the distance between the lamp and the chip is doubled, the exposure time required goes up by a factor of 4.
The UV content of sunlight is insufficient to provide a practical means of erasing the MK 2708. However, it is not recommended that the M K 2708 be operated or stored in direct sunlight, as the UV content of sun-light may cause erasure of some bits in a short period of time.