iAPX 286 BASE ARCHITECTURE

This chapter describes the iAPX 286 appli-cation programming environment as seen by assembly language programmers. It is intended to introduce the programmer to those features of the iAPX 286 architecture that directly affect the design and implemen-tation of iAPX 286 application programs.

2.1 MEMORY ORGANIZATION AND SEGMENTATION

The main memory of an iAPX 286 system makes up its physical address space. This address space is organized as a sequence of 8-bit quantities, called bytes. Each byte is assigned a unique address ranging from 0 up to a maximum of 220 (I megabyte) in Real Address Mode, and up to 224 (16 megabytes) in Protected Mode.

A virtual address space is the organization of memory as viewed by a program. Virtual address space is also organized in units of bytes. (Other addressable units such as words, strings, and BCD digits are described below in section 2.2, "Data Types.") In Real Address Mode, as with the 8086 itself, programs view physical memory directly, inasmuch as they manipulate pure physical addresses. Thus, the virtual address space is identical to the physical address space (I megabyte).

In Protected Mode, however, programs have no direct access to physical addresses. Instead, memory is viewed as a much larger virtual address space of 230 bytes (I gigabyte). This I gigabyte virtual address is mapped onto the Protected Mode's 16-megabyte physical address space by the address translation mechanisms described in Chapter 6.

The programmer views the virtual address space on the iAPX 286 as a collection of up to sixteen thousand linear subspaces, each with a specified size or length. Each of these linear address spaces is called a segment. A segment is a logical unit of contiguous memory. Segment sizes may range from one byte up to 64K (65,536) bytes.

iAPX 286 memory segmentation supports the logical structure of programs and data in memory. Programs are not written as single linear sequences of instructions and data, but rather as modules of code and data. For example, program code may include a main routine and several separate procedures. Data may also be organized into various data structures, some private and some shared with other programs in the system. Run-time stacks constitute yet another data require-ment. Each of these several modules of code and data, moreover, may be very different in size or vary dynamically with program execution.

Segmentation supports this logical structure (see figure 2-1). Each meaningful module of a program may be separately contained in individual segments. The degree of modular-ization, of course, depends on the require-ments of a particular application. Use of segmentation benefits almost all applications.

Programs execute faster and require less space. Segmentation also simplifies the design of structured software.

2.2 DATA TYPES

Bytes and words are the fundamental units in which the iAPX 286 manipulates data, i.e., the fundamental data types.

iAPX 286 BASE ARCHITECTURE

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, Each byte within a word has its own particu-lar address, and the smaller of the two addresses is used as the address of the word.

The byte at this lower address contains the eight least significant bits of the word, while the byte at the higher address contains the eight most significant bits. The arrangement of bytes within words is illustrated in figure 2-2.

2-2

Note that a word need not be aligned at an even-numbered byte address. This allows maximum flexibility in data structures (e.g., records containing mixed byte and word entries) and efficiency in memory utilization.

Although actual transfers of data between the processor and memory take place at physi-cally aligned word boundaries, the iAPX 286 converts requests for unaligned words into the appropriate sequences of requests acceptable to the memory interface. Such odd aligned word transfers, however, may impact performance by requiring two memory cycles

iAPX 286 BASE ARCHITECTURE possible for maximum system performance.

Due to instruction prefetching and queueing within the CPU, there is no requirement for instructions to be aligned on word boundaries and no performance loss if they are not.

Although bytes and words are the fundamen-tal data types of operands, the processor also supports additional interpretations on these bytes or words. Depending on the instruction referencing the operand, the following additional data types can be recognized:

Integer:

A signed binary numeric value contained in an 8-bit byte or a 16-bit word. All operations assume a 2's complement representation. (Signed 32- and 64-bit integers are supported using the iAPX

A byte representation of alphanumeric and control characters using the ASCII standard of character representation. representation. (Floating operands are supported using the iAPX 286/20 Numeric Processor Configuration.)

Figure 2-3 graphically represents the data types supported by the iAPX 286. iAPX 286 arithmetic operations may be performed on five types of numbers: unsigned binary, signed binary (integers), unsigned packed decimal, unsigned unpacked decimal, and floating point. Binary numbers may be 8 or 16 bits

iAPX 286 BASE ARCHITECTURE

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Dans le document LITERATURE In addition to the product line (Page 23-26)