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HALFTONE CODES

Dans le document XEROX Whole ALTO World Newsletter (Page 78-85)

VISUAL PERFORMANCE AND IMAGE CODING Paul G. Roetling

B. VISUALLY USEFUL INFORMATION

III. HALFTONE CODES

One simple form of binary image code has been used for somewhat over a century4 by the graphic arts industry. The binary images are referred to as halftones, and are used to give the appearance of grey while printing only full black and white. Such images are generated by combining a non- image related pattern (called the halftone screen) with the pictorial data by addition or multiplication. The combination is then subjected to a threshold to turn the continuous tone to a binary image. This process has been applied to sampled imagery by many authors (for example, see Ref. 5) and the image detail for given screen patterns has been described .. 6

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We now ignore the design of the halftone screen to consider what optimal encoding might achieve. The halftone process is essentially one of trading off grey scale for texture. That is, a combination of black/white spots is generated which, when averaged over some area, give the

To represent the sample of minimum modulation achievable at this spatial frequency, one bit must multilevel image yields the possibility of representing additional grey levels, given by

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IV. CONCLUSION

We have described an approach in which visual data for modulation transfer function of the eye can be utilized to determine the useful information in an image. At a sample interval of 20 samples per millimeter, we have found that the visually useful infonnation corresponds to approximately 2.8 bits per pixel. The shape of the visual performance curve indicates that more levels need to be represented at lower spatial frequencies and less levels at higher spatial frequencies. Thus, it has been shown that halftone or texture codes, although simple, represent image information in a manner which tends to be compatible with the characteristic of the visual system.

v. ACKNOWLEDGEMENTS

The author wishes to express his gratitude to his co- workers for many useful discussions which have helped to clarify the concepts described in this paper. In particular, D.

Kermisch and K. Knox provided many helpful suggestions.

REFERENCES

1Costigan, D. M., Fax, Chilton Book Co., Philadelphia, Pennsylvania 1971, p. 121.

2Cornsweet, T. N., Visual Perception, Academic Press, New York, New York 1971, p. 330- 342.

3D ooley, R.P., "Predicting Brightness Appearance at Edges Using Linear flnd Non- Linear Visual Describing Functions", presented at SPSE Annual Meeting, May 14, 1975, Denver, Colorado. .

4Pocket Pal, Tenth Edition, International Paper Compoany, New York, New York, 1970, p. 11.

5Klensch, R. J. "Electrically Generated Halftone Pictures," RCA Review p. 511- 533 (September 1970).

6Kermisch; D. and Roetling, P.G., "Fourier Spectrum of Halftone Images," Journ. Opt. Soc. Am. 65: p. 716-723

(1915).

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Whole ALTO World Newsletter

Technology and Tools

XEROX

APRIL 30, 1978

SPECIAL ANNOUNCEMENTS

WHOLE ALTO WORLD MEETING - The next Whole Alto World meeting is scheduled to be held from 9AM to 3:30PM on Thursday, June 1, 1978, at El Segundo in the Executive Dining Room. Dick Sonderegger and SOD are hosting. The last page of the Newsletter is a flyer announcing the meeting. Please detach your copy and post it on an appropriate bulletin board. Start your trip to the National Computer Conference right by first attending the

Whole Alto World meeting.

GENERAL NOTES

EIA BOARD LOAN REQUEST - ASD needs the use of an EIA board for software development until July 1. If you know of one that can be be spared for a time, contact John McNeley at Intelnet 8*823-2011. It would be greatly appreciated.

THE ALTO USER'S PRIMER - A new document has been prepared for the new Alto user (and the experienced user too) by Frank Ludolph, the Whole Alto World coordinator. It presents, in a non-technical fashion, an overview of the Alto network, hardware and operation, and provides pointers to the documentation. It is included in the Newsletter in the TECHNOLOGY section.

ADDRESS LABEL FORM - Have you wondered about the label used to mail the Newsletter to you? The mailing labels are maintained with Bravo using a form made up by Barbara Baird. The form, complete with instructions, positions each address in just the right place for the Xerox gummed labels, 3R311 (three across by eleven high). Retrieve [MAXC]<Forms)Form.AddressLabel, use it according to directions, print on a Dover or Sequoia, and copy onto the label sheets using a standard copier, e.g. 3100, 4500, or 7000. Yes, the Dover should handle the gummed labels, but the. printer is a shared resource and your labels might be used to print someone else's output.

WHOLE ALTO WORLD DOCUMENTS - This is just a reminder that the Whole Alto World maintains several documents to simplify your quest for knowledge. The Alto User's Primer, in addition to serving as an introduction to tile Alto World as mentioned above, serves as a first level index to other, more specific, documents. The Subsystems Catalog provides both alphabetical and' funtiona! cross reference listings to all the released Alto subsystems, briefly describing each program and pointing to its documentation. The

Hardware Catalog serves a similar function for the various hardv'are components. The Alto Network drawing maps on a single sheet of paper the Ethernets, Gateways, and servers that comprise the network. Lastly, the Newsletter provides a monthly look at changes in the Alto environment. Each of these documents, revised periodically, is maintained on the AltoDocs directory of your local IFS or MAXC.

Whole ALTO World Newsletter

TOOLS

HARDWARE

EIA BOARDS· A printed wiring version of the EOS-developed EIA board is being built by ASD. The price will be based on the number of units built. Contact Frank Brinkerhoff at Intelnet 8*823-1096 by June L There has been a great deal of interest in this board since the original EOS build closed~ don't miss this opportunity.

MAGNETIC TAPE CONTROLLER - A mag tape controller for the Alto II is now being designed by ASD. It will drive a 1600 BPI transport such as those built by Kennedy. A build is being scheduled for delivery in the August-September timeframe. The estimated cost for controller and drive is about$7K (actual price will be based on quantity and will include the sharing of engineering costs). Liz Bond is coordinating the orders for Hoag Nielson.

Contact her at [ntelnet 8*844.-1064 to order a controller. Kennedy drives, which must be ordered seperately, may be obtained through Versatec at EOM prices.

THE TRIDENT QUIET BOX HAS ARRIVED - The quitebox has been installed and evaluated. Ted Strollo reports:

"Jensen Engineering of Santa Rosa, Calif has made up a prototype of a T80 quiet box. The PARe purchasing department is likely going to go out on competitive bids on these since there are about 500 or more T80 units in Xerox. PARC will attempt to negotiate a master agreement for: such units. You should direct any inquiries to Clay Osterhout at PARCo For those of you with immediate needs, you can contact Jensen direct via your own purchasing departments. Jensen is quoting prices of $655 for single units, $589.50 for 10-24 units,

$556.75 for 25-49 units, $543.65 for 50-100 units. Contact Harold Jensen at 707-544-9450.

Delivery has been quoted as 30 days.

"The unit comes in a color scheme which matches that of Alto II. It is sized to match a companion enclosure for the T300. This makes the unit relatively large for just a T80. A storage compartment is provided inside the base with precautions having been taken to minimize storage interfering with air flow for cooling.

"Our experience with the prototype unit has been quite good. It is very quiet. In fact, the ambient room noise(61DBA) from air conditioning and Alto fans is so high that we cannot measure the SIN improvement precisely but it is definitely more than 23db. We have had the unit for two weeks now and have specified the following improvements for the final product all of which have driven the price up from the original estimate.

1) Since the T80 unit is so heavy we have gone to a revised way of inserting the unit into the box which involves removing a top cover (by removing 4 screws and a hinge bar).

Also the T80 unit can be removed leaving its cabling in place in the box. The unit can be serviced in the box by lifting this cover.

2) We required an hydraulic cover closer like that used in the Dover to prevent covers from crashing down on top of unit.

3) A vibration mode was discovered in nmning the T80 diagnostics which caused the unit to move back and forth on its casters. We therefore have required heavy duty leveling feet in . addition to the casters.

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Whole ALTO World Newsletter

4) Temperatures inside the quiet box close to the T80 side skin have been observed to get as high as 9S.3 degrees F. The exhaust fan air temperature is 97 degrees F vs a free standing T80 exhaust temperature peak of 99 degrees F. While the unit has run error free on diagnostics and in use with the Press software, we feel the temperature must be kept a little lower. Calcomp spec calls for a maximum ambient of 100 degrees F. We are requiring the addition of another air intake fan at 70 CFM, low noise to further cool the unit. The prototype has one such intake fan and one such exhaust fan.

S) We have required hinge modifications from the prototype which will permit units to be butted side by side next to each other.

"I am not specificaily endorsing this unit. It is important to give some weight to the purchasing dept's needs of getting competitive bids, negotiating a master contract with someone. We do not want to be caught in the position we were with our mouse supplier where price escalation was out of sight due to our lack of foresight in procuring the units originally. "

MAINTENANCE NOTES

CATCHING PARITY ERRORS - Occasionally users will experience memory parity problems although DMT reports no erros. While DMT will catch bad memory chips, it will have trouble detecting chips that fail intermittently or only with certain bit configurations.

One method of catching these intermittent chips is to record the location and content of parity failures when displayed by SWAT. Note the common bits set by anding together the contents of all even or odd address words within a given 4K address space, e.g. 0-17777.

(Use a 16K space for the XM machines). Using the memory layout maps attached to the Newsletter, map the common "on" bit to a specific chip and replace it. Of course, this may not always reduce to a single chip, but the number of possibilites is greatly reduced.

If the system continually crashes running different subsystems without first reporting a parity error, it could happen that the error is in an area occupied by a vital part of the operating system. Try toggleing the Memory Configuration Switch to the alternate position which reverses high and low memory by complementing the high-order memory address bit.

ALTO XM PROBLEM - The 16K memory chips used in the extended memory Alto (and all 7th build Altos) unlatch data sooner than the old 4K RAMS. The Orbit microcode accesses the value twice, always getting zero the second time. The result is that Dovers and Sequoias, which use the Orbit, cannot currently be run with an XM machine. An EO is being generated which causes the data to be latched for 10 microseconds or until the next MAR +-,

whichever comes first. Alto maintainers have been messaged the wiring changes to take care of things until the formal EO arrives.

ALTO I ETHERNET HARDWARE BUG - A very infrequently occuring bug has been located in the Alto I Ethernet interface which causes the system to SW AT with a parity error at location 600. '~~his occurs when a Pup packet is received that is just slightly . longer than the receiving buffer (about 2 words or so). What happens is that just as the packet is ending, the microcode will nm out of room in the buffer, take an early exit from the input main loop, and dive into the status posting code where it says:

mar +- EPloc ;=600

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Whole ALTO World Newsletter

md ... EPFct ;gate interface status to bus.

Unfortunately two of the interface status bits, CRC and IT, are not syncronized. They can be changing even as they are slithering down the bus into memory, causing the parity bit to have an indetermininate value. (Alto lIs have a register between the processor bus and the memory ,which serves as a syncronizer, so they aren't susceptible to this bug.) The next microcode will contain a fix, changing the status posting microcode to run the status through an R register before putting it in memory, thus using the register as a syncronizer. Since 600 is such a magic number, it would have been noticed before in the last 4 years. Since it hasn't, it's not worth changing the ROMs in every Alto I, but the fix will be there in the microcode if a change is made for any other reason.

HARDWARE CHECKOUT BY THE USER: PART II - Last month, methods of verifying performance of the Alto's workstation using CRTTEST and KEYTEST were presented. This month the diagnostics used to checkout the Alto processor are discussed. DMT and MADTEST are used to test the various functional pieces of the Alto processor: main memory, microprocessor memories (RAM and PROM), arithmetic-logic unit (ALU), registers, and data paths (it isn't necessary to know what they do).

DMT tests the main memory, the area occupied by your data and most, if not all, of the subsystems that you run. When DMT is executed, the display will be black except for a small white square that bounces randomly about the screen.

DMT should be run for long periods, say overnight or over the weekend. If the Alto is left in the Executive, DMT will be called after 20 minutes. In the morning, while waiting for the disk to spin up to speed, depress and hold the's' key. A three line message will be displayed a few inches from the bottom of the screen. The second and third lines should begin "0 Errors ... ". If some errors have been found, the memory chip location(s) will be indicated.

Don 'I boot the Alia; the machine may not work and the location in/onnation will be destroyed. Inform the local maintenance group.

MADTEST, the Microcode Alto Diagnostic Test, exercises much of the rest of the processor.

It is actually a collection of routines that test the RAM, PROM, ALU, registers, and data paths.

It is run in the same manner as KEYTEST and CRTTEST, namely, execute NetExec by booting from the Ethernet or typing netexecCR to the Executive, and then type madtestCR

The screen will indicate at the top the test routine being run, the number of passes completed, and the errors detected (if any). The middle of the screel1 will ('I)ntain trash (the unformated contents of memory) and below that, a band containing the phrase "Black on white means DO TEST". Immediatly below the band are the various tests that will be run.

The cursor consists of the usual arrow (like Bravo) with a changing series of black and white horizontal lines through it. The number and location of the lines change to let you know that something is happening, because it isn't always apparent from the rest of the screen. The cursor also moves about the screen in its usual fashion except that sometimes it jumps (after a few seconds delay) rather than moving smoothly as is customary. You may also notice the screen "tearing". Both of these effects are a result of the level at which the

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Dans le document XEROX Whole ALTO World Newsletter (Page 78-85)