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Functional Description Supports Various Microprocessors

Dans le document National Semiconductor Corporation (Page 24-27)

The In-System Emulator is a one system solution for users who wish to prototype systems involving one or more types of microprocessors. By chang-ing a target CPU card, ISE can be used to emulate various different microprocessors such as the 8080, 8048 family and 8070 family.

Multiprocessor Support

Many complex microprocessor-based systems use two or more microprocessors in a distributed or multiprocessor configuration. ISE will accom-modate two target cards, and will support two microprocessors operating on a common on-board bus, such as National's MICROBUS.

All memory mapping, trace and breakpoint features are available for multiprocessor emulation when-ever both processors are on a common bus. When the two microprocessors are emulated in this system, breakpoints can be set on either of the microprocessors, and the trace memory will record all activities on the common bus, including which processor is on the bus during each cycle.

Multiprocessing emulation is accomplished by connecting two bus control probes from the target card cable assemblies to the application system.

When attached to the user system's bus arbitration circuitry, these probes enable the user to direct ISE to dynamically monitor the target card on the common bus.

Powerful Debugging Capability

National's ISE provides all the usual features of a powerful In-System Emulator, plus many more that make it the most powerful unit available today. The usual features include: program loading from the host mass storage unit to the ISE program memory;

saving programs in the ISE memory on the host system's mass storage medium; memory examina-tion and modificaexamina-tion; register examinaexamina-tion and modification. Some of the additional and more powerful characteristics include:

• Real-Time Emulation of the Target Microprocessor

Real-time emulation means that the target microprocessor is emulated in an applications system with the same hardware and software timing characteristics that the microprocessor chip will exhibit when it is plugged into the system. Real-time emulation has been designed into ISE. Some design characteristics contribut-ing to real-time emulation are:

- Separation of the Host Development System Function. Separating ISE from the host development system is a major contribution to real-time emulation. ISE uses a separate

internal bus from the host system, thus elim-inating bus access conflicts between the emulation function and the host control functions. Its internal structure is optimized for microprocessor emulation, and is not compromised by some predefined architec-ture. However, via the RS232C link and the driver program in the host, ISE is able to u!le all of the host system peripherals.

- System Clock Selection. In the early stages of the applications system checkout, where minor timing variations are more easily tolerated, the applications system designer may choose to run the emulation using the ISE system clock. In the final checkout stages, where real-time emulation is much more critical, the designer may choose to run the emulation using the applications system clock. ISE will support either mode of operation.

- Positioning of the Emulator Processor. Propa-gation delays in cables and buffers can con-tribute significant timing errors to the emulation process. For this reason, the emulation processor is iocated on a cable card only eight inches from the emulation plug to the applications system microproces-sor socket. High speed buffers are used to transmit signals between the emulation processor and the applications system.

- Emulation Processor Selection. Wherever possible an exact copy of the microprocessor being emulated is used as an emulation processor. For example, when an 8080 micro-processor is being emulated, an 8080 is used as the emulation processor. Instruction execution times and control signal timing are therefore identical to the timing that will be experienced in the final system.

• Thirty-Five Breakpoint Conditions

Two breakpOint registers (BPC) can be defined on a 32-bit maskable word. Each breakpoint register is specified by:

- 16 bits of address - 8 bits of target CPU status - 8 bits of user hardware status

Each bit of the 32-bit breakpOint register mask may be specified to compare on "1" or "0," or "don't care."

The user can then specify a breakpoint to occur when anyone of the following conditions is met:

- If BPC #1 is met - If BPC #2 is met

- If BPC #1 or BPC #2 is met

- If BPC #1 is met after BPC #2 is met - If BPC #2 is met after BPC #1 is met

ISE can also be told to "coast" after the break-point combination has been satisfied before suspending operation:

- Coast until n more BPs are encountered

- 'Coast until n more memory read/write cycles are encountered

.- 'Coast until n more I/O read/write cycles are encountered

Note: 0 < n < 256.

There are five Breakpoint (BP) combinations and seven "Coast" combinations, making a total of thirty-five total combinations.

• Program Trace

ISE maintains a constant record, in real-time, of the last 128 cycles performed by the target microprocessor. Forty bits of information are recorded for each cycle: memory is selectable in four ways:

- All read/write cycles - • Instruction fetches only - 'Memory read/write cycles only - *1/0 readlwrite cycles only

ISE generales a Sync Pulse each time data is recorded in the trace memory. In addition, the user may specify that the applications program be halted after 64 words are recorded in the trace memory. - Dump trace memory for examination - Change trace specifications - Change memory map system memory.

• Microsecond Timer

National's ISE has a 16 second timer which counts in one-microsecond increments. The user may use this timer to measure the time elapsed between any two points of his program. The two points in the program must be defined through breakpoint conditions; the clock starts counting as breakpoint condition #1 is encountered and

Convenient Software

Several tools are provided to make ISE a very convenient emulation system to use. Many of the debugging features available for software development, like symbolic debugging, are now available for system development.

• Symbolic Debugging

Programmers use symbols to reference program and data memory when writing programs, but they are usually required to use absolute hexa-decimal addresses when referencing those loca-tions during program debug. ISE allows the designer to use lhose same symbols to

refer-* In-Line Assembler

A one-pass in-line assembler is provided to allow modification of object code in ISE memory or the applications system memory without having to manually convert symbolic instructions to ma-chine language. The in-line assembler accepts program modifications in the assembly language of the target microprocessor, assembles them, and inserts them into the object program at the locations specified by the system programmer.

• Disassembler

The disassembler examines specified segments of ISE or applications system memory, disas-sembles them, and displays their contents in the assembly language mnemonics of the target microprocessor. This feature eliminates many of the tedious manual steps normally involved in applications system debug.

• Automatic Testing

The application system designer often wishes to perform a predefined sequence of tests on the system over a relatively long period of time. ISE has an automatic testing mode whereby the designer may write a sequence of test steps in a language similar to BASIC, store those tests in the memory of the host system, and initiate the test sequence. ISE will perform the tests in the specified sequence and record the results on a disc or a hard copy device of the host system.

Branching and conditional branching are also permitted in the test program. This feature is especially useful for rigorous proof that all parts

STARPLEX DEVELOPMENT SYSTEM

1 -I

of the applications system are in fact working, for detecting and documenting infrequent failures, and for performing "life" tests.

The list of predefined test sequences resides in a file created by using the 1St:: software or the STARPLEX Text Editor. Once the file is resident on the STARPLEX disc, it can be retrieved, de-leted, edited, etc., by the ISE SoHwam Package.

The following commands allow the user to perform automatic testing functions:

DELETE Deletes a range of lines from test program.

EXECUTE Executes the test program.

LIST Prints the test program to a selected device.

LOAD IN FILE Loads the specified test BREAKPOINT LOGIC

Saves the test program on disc.

Deletes the entire test program.

Directive to end test program and return control to command mode.

Unconditional branch to another statement in test program.

Conditional branch to anothEr statement in test program.

Enables user to interact with test program at run time to specify data values.

Prints number and string data

I

TARGET MICROPROCESSOR

TARGET MICROPROCESSOR

EMULATION CABLES

- - - , FIGURE 2_ In-System Emulator System Configuration

Dans le document National Semiconductor Corporation (Page 24-27)

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