Figure 2.9: NBCO sample patterned for a 6 point measurement. The dark region at the center is the gate contact on the backside of the substrate. The current flows through the horizontal path and voltage probes are positioned along the current path, allowing the Hall effect and the longitudinal resistance to be measured. The width of the path is500μm.
2.3 The Field Effect Technique
In this section, we discuss the basic ideas of the electric field effect, focusing mainly on the approach used in our study of NBCO. This method is analogous to the one used in semiconductor integrated circuits. We will come back to the field effect in section 3.4, where we will use a more original approach.
Basic ideas about the field effect
At the heart of most of our electronic devices are transistors which for logic appli-cations are often field effect transistors (FET). The principle behind a field effect transistor is the modulation of the carrier density and hence the channel resistance between two terminals, called the source and the drain, by applying a voltage to a third terminal called the gate. The conducting channel between the source and the drain is usually doped silicon. To form the gate, this channel is covered by a thin insulating oxide layer (usually SiO2, more recently HfO2) layer with a metallic elec-trode on top. A bias voltage applied between the gate and the channel modulates the carrier density of the latter, tuning its conductance (see Fig.2.10).
A similar technique can be used as a tool to study the properties of a material as a function of its carrier concentration. In our experiments, we investigate the transport properties of a NBCO film used as the channel, varying the gate voltage.
This approach has different advantages over the more conventional chemical doping technique: the carrier density is modulated in a “clean” way as compared to chemical doping since the intrinsic disorder is not changed. The approach is also reversible and can be local. This technique has however its limitations such as the need for good
Figure 2.10: Schematic of a field effect transistor (FET, here MOSFET) viewed from the side.
The channel resistance between the drain and the source is modulated by the voltage applied to the gate. (Image from [32])
gate dielectrics and the requirement of very thin channel layers (the screening length being very short at metallic densities). Indeed the induced carrier density, that is related to the gate voltage, is limited by the breakdown voltage, the maximum bias voltage that the gate dielectric can sustain before a discharge occurs. The electric field present at the interface between the gate dielectric and a metallic channel is screened by the mobile charges over a typical length, called theThomas-Fermi(TF) screening lengthλT F:
λT F =
0EF
6πne2 , (2.6)
where 0 is the vacuum permittivity, the relative permittivity of the studied ma-terial, EF and n being its Fermi energy and carrier concentration respectively, and finally e the elementary charge.
FET structures based on NBCO
For our field effect experiments, we fabricated FET devices as shown in figure 2.11.
In this configuration, the gate dielectric is the STO substrate itself. Indeed STO has interesting properties in that respect: its dielectric constant reaches 104 at low temperatures [33–36] and STO can sustain large fields, at least up to 4 MV/m, the maximum value used in our measurements.
Although strontium titanate can sustain very large fields, for different experimental reasons, too large voltages cannot be used. Indeed, the insulation of the wires is not guaranteed at high voltages, and some measurements are done in Helium, the gas may ionized at such large voltages. In order to reduce the voltage for a given electric field, and hence a given carrier density modulation, a simple solution is to reduce the thickness of the gate dielectric. Using a grinding machine, the center of the 0.5 mm substrates were thinned down to about 100μm. We also started with substrates only 0.1 mm thick, but they turned out to be more difficult to manipulate, particularly removing the sample from the holder after deposition is delicate. Figure 2.9 shows a FET device realized by grinding a 0.5 mm substrate. The gate electrode can be seen on the backside of the substrate.
2.3. The Field Effect Technique 17 The charges induced by the field effect can be measured by two different means.
The first method uses an electrometer (Keithley 6514) in series with the voltage source (Kepco APH1000DM or Keithley 2410). This way we directly measure by integrating the charging current how many charges are brought to the interface.
However, one must take care of the leakage current. In our measurements, we integrated the charging current only when the voltage is swept and we checked that the leakage current is negligible once the bias is set.
Figure 2.11: Left: Schematics of the resistance measurement setup. The STO substrate is milled to reduce the thickness down to about 100μm below the measured path [37]. A gold electrode (G) is deposited on the backside of the STO and is connected by silver paint. Contacts to the NBCO film are realized by wire-bonding on gold (depositedin situ) pads. An amorphous NBCO layer (a-NBCO) protects the ultrathin crystalline NBCO layer. Right: Schematics of the measurement setup used to determine the charge modulation. Another method uses an LCR meter instead of the electrometer.
The other method to evaluate the charge modulation is to measure the differen-tial capacitance C(V). We measured the capacitance with an LCR-meter (Agi-lent 4284A) with an autobalancing bridge method. For an ideal capacitor with capacitance C, one expects that, for a bias V, the charge brought to the interface ΔQ(V) = CV. The situation is more complicated with a dielectric such as STO.
Indeed, the dielectric constant of STO changes by two orders of magnitude as the temperature is decreased from room temperature (≈300) to 4 K (≈10 000), and is also bias dependent at low temperatures [35,37], see Figure 2.12. In this case, the induced charge can be calculated as
ΔQ(V) = VG
0 C(V)dV . (2.7)
Once the number of induced chargesΔQis known, the change in areal carrier density Δn2D is calculated as Δn2D = eS1 ΔQ, where S is the area of the NBCO path over-lying the back-gate electrode. This formula neglects side effects (the precise shape
Figure 2.12: Left: Capacitance as a function of temperature for a 0.1 mm thick STO substrate with gold electrodes 0.85×0.65 mm2. Center: Differential capacitance at 5 K as a function of bias voltage. Both measurements are performed with a LCR-meter at 1 V ac and 1 kHz signal. Right:
Comparison between the gate voltage dependence of the capacitance measured by an electrometer and a LCR meter atT = 4.2K for a 0.1 mm thick STO and 20 mm2 electrodes.
of the field lines) but nevertheless seems to give reliable enough results. Indeed, we checked using Hall effect measurements on a thin film of doped STO at 100 K (see section 3.4) that the values obtained using the methods described above agree with the changes observed in the Hall response. We did not use Hall effect in NBCO, as it is temperature dependent and cannot be simply interpreted. Note that in our discussion, we assume that all of the induced carriers Δn2D are mobile. Salluzzo et al [38] performed x-ray absorption spectroscopy in the presence of an electric field to study the mechanism of field-effect doping in the 123 HTS. Their analysis shows that holes are created at the CuO chains of the charge reservoir and that field-effect doping of the CuO2 planes occurs by charge transfer, from the chains to the planes, of a fraction of the overall induced holes.
According to Eq.2.6, and using values suitable for NBCO (EF ≈ 1eV, ≈ 10 and n≈1021/cm3), one finds that the field is screened over a typical distance of ∼1nm.
This means that the carrier concentration is substantially changed over one unit cell only. For this reason, we grew films only 3 uc thick, the thinnest films that are superconducting with our preparation conditions (see Fig.2.4 and 2.8).