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CONTROL ROUTINE (CNT)

* REMl\RKS

E. CONTROL ROUTINE (CNT)

This routine checks for section selection, re- entry of parameters, End of Section and End of Test stop, and for Repeat Section or Repeat Test.

1. Check for re- entry of parameters.

2. Check for section 0 selection. If not selected, go to item 6.

3. Run section O.

4. Check for End of Section stop.

5. Check for Repeat Section.

6. Check for section 1 selection. If not selected, go to item 10.

7. Run section 1.

8. Check for End of Section stop.

9. Check for Repeat Section.

10. Check for section 2 selection. If not selected, go to item 14.

11. Run section 2.

12. Check for End of Section stop.

13. Check for Repeat Section.

14. Check for End of Test stop.

15. Check for Repeat Test.

16. Return to SMM. If pass count is not zero, the test will be repeated.

III. PHYSICAL REQUIREMENTS A. STORAGE REQUIREMENTS

Approximately 500 locations.

B. TIMING - 0 min. 45 sec.

C. EQUIPMENT CONFIGURATION

1. 17X4 Computer with 4K memory.

2. A device for loading the program.

202-6 60182000 J

1774 SYSTEM CONTROLLER COMMAND TEST (CAR01B Test No. 1B)

(CP = 02) 1. OPERATIONAL PROCEDURE

A. RESTRICTIONS

1. If the operator wishes to run section 5 or 6, he must call the system controller command test alone. The test overlays the normal interrupt processor with its own special processor in these sections.

2. Section 5 may be run only if the system controller has an AQ channel. A special interrupt generator, which is attached to the AQ channel, is used to generate interrupts on the lines corresponding to bits set in Q.

a. Special Interrupt Generator

The INT special cables consist of a male 61-pin connector and 15 female 3-pin interrupt jacks. Each Q bit (bit 1 to bit 15) is wired via 3-wire interrupt cable from the 61-pin connector to the 3-pin interrupt jacks.

The special interrupt cable allows each Q bit (excluding bit 0) to generate the corresponding interrupt level.

3. If sections 5 or 6 are selected, the test must be executed to completion. This is to allow restoring of the normal interrupt processor for additional tests that are to be executed.

B. LOADING PROCEDURE

This test is called as test number 1B under SMM1 7. It may be run with other tests if (and only if) section 5 is not chosen and section 6 is not chosen.

C. PARAMETERS

1. Normal operation runs test sections 1 through 4 and 6 and requires no

parameters~

2. To alter parameters, use the procedures outlined in SMM17. The identification word and Stop/ Jump parameter are displayed on the first stop. On the second stop, set bit 0 to run section 1, etc., according to the table below:

Bit in A

o

1

2 60182000 L

Test Section

Section 1 - - LDA, Character mode, with character designation bit = O.

Section 2 -- LDA, Character mode, with character designation bit = 1. Indexing used here.

Section 3 -- STA, Character mode, with character designation bit =0. Indexing used here. 204-1

I

Bit in A 3

4

5

Test Section

Section ,4 -- STA, Character mode, with character designation bit = 1.

Section 5 - - Character mode enable! disable with interrupts.

Section 6 - - powerfail interrupt on line 0 and auto restart test.

II. MESSAGES A. NORMAL

204-2

1. Test identification at beginning of test:

CAROlB. SYSTEM CONTROLLER TEST 2. End of test:

A 1B04

Q STOP

A Q

PASS NO. RETURN ADDRESS

3. Message to operator to hook up the interrupt generator to the AQ channel (section 5):

INTP. GEN. ON AQ CHAN!

4. Message to operator that he may restore the AQ channel as it originally was (section 5):

RESTORE AQ CHAN.

5. Message to operator to set AUTO RESTART switch:

SET AUTO RESTART SWITCH

6. Message to operator to drop mainframe power, then bring it up again, checking Auto Restart operation:

DROP POWER, THEN RESTORE

7. Message to operator that he may clear the AUTO RESTART switch:

CLR AUTO RESTART SWITCH

60182000 J

B. ERROR

'The following is typed out:

1. Identification word 2. Stop! Jump parameter 3. Section and error number 4. Return address

5. Actual results 6. Expected results C. ERROR STOPS

Error Code 01

02

03

04

05

06

07

60182000 H

Description

LDA, character failed with character designator bit

=

O.

(A)

=

actual contents of A upon the LDA character instruction

(Q) = expected contents of A upon the LDA character instruction

Same as 01 above, except the character designator bit here = 1.

STA, character failed with character designator bit = O.

(A) = actual data stored in memory by the STA character instruction

(Q)

=

expected data stored in memory by the STA character instruction

Same as 03 above, except the character designator bit here

=

1.

Level 0 - No interrupt occurred when power was dropped on the mainframe.

Level 0 - An interrupt occurred when power was dropped, but skip on parity error indicated a parity error caused the interrupt.

Level 0 - An interrupt occurred when power was dropped, but skip on protect fault indicated a protect fault caused the interrupt.

204-3

Error Code 11 - IF

'21 - 2F

Description

Character mode was not properly re- enabled upon exit from interrupt state. Error 11 corresponds to interrupt state I, 12 corresponds to state 2, etc.

Character mode was not properly disabled when an interrupt occurred on the line indicated. Error 21 corresponds to state 1, 22 corresponds to state 2, etc.

III. DESCRIPTION

A. Section 1 - LDA, Character mode is checked with the character designator bit

=

0 (upper half of memory location referenced). The EOR instruction is used in testing proper operation.

B. Section 2 - LDA, Character mode is checked with the character designator bit

=

1.

Indexing is used, with the index originally set

=

FFFF. The index is then decremented by twos, checking proper right shift and sign extension of the address in I.

C. Section 3 - STA, Character mode is checked with the character designator bit

=

O.

Indexing is used, with the index originally set = FFFE. The index is then decrement-ed by twos, checking proper right shift and sign extension of the address in I.

D. Section 4 - STA, Character mode is checked with the character designator bit

=

1.

E. Section 5 - The automatic disabling of Character mode is checked upon an interrupt on each interrupt line (except 0). The automatic re-enabling of Character mode is checked upon execution of exit state for each interrupt state. This requires the operator to hook up the AQ interrupt generator, and, upon completion, to remove it.

F. Section 6 - Test the auto restart feature, checking that the proper level of interrupt is generated when power is dropped on the mainframe. The operator is instructed to set the AUTO RESTART switch, turn off power and turn it back on again, and clear the AUTO RESTART switch. Unlike lines 1- F tested in section 5, this is tested only once (unless Repeat Condition is set).

204-4

NOTE

The system controller test must be called to run alone if section 5 is to be run. Section 5 can only be run:

a) If the system controller has an AQ channel.

b) If a special interrupt generator is available which is attached to the AQ channel, and which generates an interrupt on each line corresponding to a bit set in Q.

The system controller test must be called to run alone if section 6 is to be run.

60182000 H

IV. PHYSICAL REQUIREMENTS A. STORAGE REQUIREMENTS

Approximately 90010 locations.

B.

TIMING-C. EQUIPMENT CONFIGURATION

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