order byte of the last SCSI bus transfer is not transferred to memory. Instead, the byte is tempo-rarily stored in the SWIDE register. The hardware uses the WSR bit to determine what behavior must occur at the start of the next data receive transfer.
The bit is automatically cleared at the start of the next data receive transfer. The bit can alternatively be cleared by the microprocessor or through SCRIPTS. The bit can also be used by the micro-processor or SCRIPTS for error detection and recovery purposes.
SWIDE Register
This register stores data for partial byte data trans-fers. For receive data, the SWIDE register holds the high-order byte of a partial SCSI transfer which has not yet been transferred to memory.
This stored data may be a residue byte (and there-fore ignored) or it may be valid data that will be transferred to memory at the beginning of the next Block Move instruction.
SODL Register
For send data, the low-order byte of the SODL register holds the low-order byte of a partial mem-ory transfer which has not yet been transferred across the SCSI bus. This stored data is usually
"married" with the first byte of the next data send transfer, and both bytes are sent across the SCSI bus at the start of the next data send block move command.
Chained Block Move SCRIPTS Instruction
A chained Block Move SCRIPTS instruction is primarily used to transfer consecutive data send or data receive blocks. Using the chained block move instruction facilitates partial receive transfers and allows correct partial send behavior without addi-tional op code overhead. Behavior of the chained Block Move instruction varies slightly for sending and receiving data.
For receive data (Data In for initiator or Data Out for target), a chained Block Move instruction indi-cates that if a partial transfer occurred at the end of the instruction, the WSR flag is set.The high order byte of the last SCSI transfer is stored in the SWIDE register rather than transferred to mem-ory. The contents of the SWIDE register should be the first byte transferred to memory at the start of the chained block move data stream. Since the byte count always represents data transfers to/from memory (as opposed to the SCSI bus), the byte transferred out of the SWIDE register is one of the bytes in the byte count. If the WSR bit is clear when a receive data chained Block Move instruc-tion is executed, the data transfer occurs similar to that of the regular block move instruction.
Whether the WSR bit is set or clear, when a nor-mal block move instruction is executed, the con-tents of the SWIDE register will be ignored and the transfer takes place normally. For "N" consec-utive wide data receive Block Move instructions, the 2nd through the Nth Block Move instructions should be chained block moves.
For send data (Data Out for initiator or Data In for target), a chained Block Move instruction indicates that if a partial transfer terminates the chained block move instruction, the last low-order byte (the partial memory transfer) should be stored in the lower byte of the SODL register and not sent across the SCSI bus. Without the chained block move instruction, the last low-order byte would be sent across the SCSI bus. The starting byte count represents data bytes transferred from memory but not to the SCSI bus when a partial transfer exists.
For example, if the instruction is an Initiator chained Block Move Data Out of five bytes (and WSS is not previously set), five bytes will be trans-ferred out of memory to the SCSI core, four bytes will be transferred from the SCSI core across the SCSI bus, and one byte will be temporarily stored in the lower byte of the SODL register waiting to be married with the first byte of the next block move instruction. Regardless of whether a chained Block Move or normal Block Move instruction is used, if the WSS bit is set at the start of a data send
f-bst Memory 03 02 01 00
1
07 06 05 04 DB OA 09 08 OF DE 00 DC 13 12 11 10
~
~-""""~ ' -----1 " " ----1 . . . . ---- 32 Bits ----1~~1 00 04 08 DC 10
Chained Block Moves
command, the first byte of the data send command is assumed to be the high-order byte and is "mar-ried" with the low-order byte stored in the stored in the lower byte of the SODL register before the two bytes are sent across the SCSI bus. For "N"
consecutive wide data send Block Move com-mands, the first through the (Nth - 1) Block Move instructions should be Chained Block Moves.
SCSI Bus
04 03 06 05
DB OA 00 DC
r-
16 Bits ~otes: CHMOV 5, 3 when DADLOUT: Moves five bytes from address 03 in the host memory to the SCSI bus (bytes 03, 04, OS, and 06 are moved and byte 07 remains in the low order byte of the SCSI Output Data Latch register and is married with the first byte of the fol-lowing MOVE instruction).
OVE 5, 9 when DADLOUT: Moves five bytes from address 09 in the host memory to the SCSI bus.
Figure 2-6: Block Move and Chained Block Move Instructions
Chained Block Moves
Chapter 3
PCI Addressing