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AN ATTEMP IS MADE TO DETERMINE WHICH OF THE

Dans le document PRODUCT CODE: (Page 31-36)

C ·~·

.0

-11.1.35

~GSTRT

(KGll CYCLIC REDUNDANY CHECK OPTION)

THIS ROUTINE IS AN IN-LINE DEVICE TEST AND IS RUN AFTER

ALL PROCESSOR TEST CODE (EXCEPT MEMORY

EXPANSIO~)

IS COMPLETED.

THE KG11 IS A NON-INTERRUPTING DEVICE, AND THE TEST CODE IS SIMILAR TO PROCESSOR TEST.

THREE FUNCTIONS OF THE KG11 ARE TESTED ,CRCI2, CRC16, AND CCITT.

EACH FUNCTION IS TESTED BY TRANSMITTING KNOWN DATA TO

THE KGll, AND COMPARING THE RESULTS OF THE HARDWARE OPERATION WITH A

TABL~

F KNOWN RESULTS. THE TEST IS REPEATED

4000(OCTAL) TIMES EACH PASS.

11.1.36 DMII-BB (MODEM CONTROL MULTIPLEXER)

THIS ROUTINE IS AN IN-LINE DEVICE TEST AND IS RUN AFTER

ALL PROCESSOR TEST CODE (EXCEPT MEMORY EXPANSION) IS COMPLETED.

THE DM11-SS IS OPERATED IN MAINTENANCE MODE WITH INTERRUPTS ENABLED AND THE LINE SCANNER RUNNING. THE SCANNER

MEMORY IS INITIALLY CLEARED TO 0, AND DETECTION OF THE MAINTENANCE MODE INPUTS TO THE SCANNER WILL CAUSE AN INTERRUPT ON EACH LINE.

11.1.37 M792YA (PAPER TAPE BOOTSTRAP LOADER)

THIS IS AN INLINE DEVICE TEST. THE CONTENTS OF THE M792YA READ ONLY MEMORY ARE ADDED TO FORM

A CHECKSUM. THE RESULT IS COMPARED WITH A KNOWN VALUE.

IF THE CHECKSUMS ARE DIFFERENT, AN ERROR IS REPORTED.

THE TEST IS REPEATED 4000(OCTAL) TIMES.

11.1.38 M792YB (BULK BOOTSTRAP LOADER)

THIS IS AN INLINE DEVICE TEST. IT IS A COMBINED TEST FOR THE M792Ya AND MRI1-DB BULK STORAGE

DEVICE BOOTSTRAP LOADERS, WHICH BOTH HAVE THE SAME ADDRESS ON THE 1/0 PAGE.

AN ATTEMP IS MADE TO DETERMINE WHICH OF THE

TWO DEVICES IS INSTALLED IN THE SYSTEM. IF NEITHER DEVICE IS RECOGNIZED, AND NO TIME-OUT TRAP OCCURS, AN

ERROR IS REPORTED. IF THE DEVICE IS RECOGNIZED, A CHECKSUM OF THE DEVICE'S READ ONLY MEMORY IS COMPUTED, AND COMPARED WITH A KNOWN VALUE FOR THAT DEVICE. IF THE CHECKSUMS DIFFER, AN ERROR IS REPORTED. THE TEST IS RUN 4000(OCTAL) TIMES.

12. LISTING

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1025 IU6 hn

U'a 1199 un

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14*3 1448 '468 1413

1611 UU

IU3 1722 1741

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1861 IS"

'893

$9U 3925 3941 3959 5961 39'2 S985 3994

~~04

4021 U46 1066 h06 f133 11'3 4217 4257 US0 43'6 .386 l4U l450 1465

HH

.507

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4691

VEe TORS

lBSO"UTE CORE DU~P

OEVICE DRIVER OV£R"AV "INKAGES GT' VAAIAB~ts

OEVICE REGI5TER ANO VECTOR TAB"E

PROGRA~ INITIA,llATION OEVICE INITI'"I~ATION

TE~ETYPE RECEIVER INTERRUPt SERVICE

TE~ETYPE TRANSMITTER INTER~UPT SERVICE

~IGH SPEfO READER INTERRUPt SERVIC~

~IGH SPEED PUNCH INTERRUPT SERVICE CR{1,CM11 CARD READER INTERRUPT SERVICE 0011 CARD READER INTERRUPT SERVICE .rel1 ANA"OG MU"TIP"EXER INTP.RRUPT SERVICE '001 AID CONVERTER INTERRUPT,SERVICE 4A11 WITH SCQP~ INTERRUPT SERVICE RK11 DISK INTERRUPT SERVICE RP11 DISK INTERRUPT SERVICE

~Cil DIS~ INT~RRWPT SERVICE qr!l DISK INTERRUPT SERVICr MAG TAPE INTERRUPT SERVICE

~Wil.P PROGRAMMAR"E C"OC~ !NTERRUPT S~RVICE

KWil""

RrA~ TIME C,OCK INTERRUPT SERVICE OP11 SVNC~RONOUS "INt UNIT INTERRUPT SERVICE oeil ASYNCH~ONCUS ~INE UNit #1 INTrRRUPT SERVICE OCi1 ASYNCMRONOUS ~INE UNIf #2 INTERRUPT SERVICE OMil ASYNCHRONOUS MU~TIP~EXER INTERRUPT SERVICE

~INE PRINTER INTERRUPT SERVICE OtCT1PE INTERRUPT SERVICE

BUS TESTER SECTION 1 INTERRUPT SERVICE BUS TESTER ~tCTION 2 INTE~RUPT SERVICE BUS TESTER SECTION 3 INTERRUPT SERVICE RUS TESTER SECTION 4 INTERRUPT SERVICE eASle INSTRUCTION TEST

TEST COMPARE INSTRUCTION INDEXED TEST MOVE IN$TAUeTION POR INOEX TEST elC INSTRUCTION rOR INOEXING TEST 5UBTRACT INSTRUCTION rOR INO~XING T~ST UNARYS IND£XEO

TEST JMP INDEXED TEST COMPAR~ INSTRUCTION TEST MOVE INSTRUCTIONS TEST SIC INSTRUCTION INDIRECT

T~ST sua TRACT INSTRUCTION TEST ACD IN~IRECT

TEST UNARY' INDIRECT

T£$T COMPARE INSTRUCTION INO[XEO AND INDIRECT TEST MOVf INSTRUcT10~S INDEXED AND INOIR~CT

TEST ale INSTRUCTION INOEXED ANO INDIReCT 'EST ADO INOIR£CT WITH INDEXING

TEST UNARYS INOIRECT W1T~ YN~EXING

TtST

or

COMBINED IND.XING 4NO INDIRECT TEST BIC INSTRUCTION INDEXEO AND INDIRECT 'EST COM~AR~ IBYT., INSTRUcTION INOEXEO 'EST MOVE (BVT£, INSTRUCTION POR INDEX

T~ST Ble IByrE' INSTRUCTION ro~ INDEXING 'EST UNA~YS (6YTP., I NOEXEO

TE'T COMPARt IBVTEI INSTRueTION INDIRECT 'EST MOV£ lenE) INSTRUCTION INOlRECT TEST UNARV IBYTE, INST~UCTfoNS INDIRECT

fEST COMPARE (eYTEl INSTRUcTION INOEXEO ANO INDIRECT TEST MOV~ leYH) INSTRUCTIoN INOEXED AND INDIRECT TEST

ale

IBYTE, INSTRUCTION !NOIRE~T WITH INDEXI~G

TEST UNARY' (BVTE) INDIRECf WITH INDEXING TEST JSR INSTRUCTION

TEST NESTED SUaROUTINE5 TtST ROTATE 000 ~YTE

TEst A~~ cOMalNATloNS

or

NDMBERS WITH COMPARE INSTRueTloN

'EST

ROTATING A~~ NUMBERS

Ttst

ROTATING BYTE EVEN/005. A"~ NUMBERS

TEST ADD ANQ SUBTRACT A"" NUMBERS AGAINST fIXED NuMBrRS T,Sf COMP~I~~NTING A~" NUMBE~S

T~ST GOMB (EVEN BYTE' TEST COM~ 1000 BVTE,

TtST COMPAR~ A~~ VA"UE EVEN AVTE WIT~ ~oo TEST SWA~

TEST A"" COMBINATIONS

or

SWA~

POP.11/40,4~ INSTRUCTION TESTS TtST XOR INSTRUCTION

TtST XOR USING INDEX DEfERREO TEST SOS FOR BRANCH

TtST SOB rOR NO BRANOH TEST MARK INSTRUOTION TEST THE SXT INSTRUCTION TEST T~E RTT INSTRUCTION TEST MU"TIP,v INSTRUCTION TEST ASH INSTRUCTION TEST ASHO INSTRUOTION TEST TME OIVIDE INSTRUOTION 'EST A~" FIS INSTRUCTIONS tOGETHrR OQMBINED FPP INSTRUCTION TEST TEST MTPO INSTRUCTION T[ST MFPD iNSTRUCTION TEST T~E SP~ INSTRUC'ION TEST PIRO ~ARPWARE

TEST QF WAIT (TRACE TRAPS)

TEST TO StE IF 1/0 Of-VICES WERE SE~ECTEO

TEST KE11.A (PDP.l~/201 ~ErT SHIFT TEST KE11 •• (PDP.l;/20l RlaHT SHlPT TEST KE11.A (PDP.1'/201 NOMMA"I~E

T[ST KEll.A (POP.11/201 HUCTIP~Y AND DIVIDE BA,K TO RAtK TEST M19~YA PAPER TAPE aoofSRTAP "OAOE~

TEST M'92VR, MR1~DB AU,K BOOTSTRAP "OADERS UOe.11 CDNTRO~ TEST

T~ST OF OR11B IN MAINTENANeE MODE

,rOR

NQRMA~

OPERATION RUN WITH

Al~ $W.I'C~ES ~OWN

,SA1"t UP ••

*HA~T

ON

ERROR

'S~14,t UPie.SCO~~ ~OOP

PROCfSSQ~

'ES,

,S~13'l

UP ••• INHISrT PRINT OUT

,S~12't up ••• rREEiE 'ROCESSO~ IN ~aRAENT MOD~

,S~lt't UP~.'INHleIT SUa.PRo~RIM l'tRA'tON(WATOHOO~S

ARE

N~T C~£CKED!

'$Al~"

UP ••• 1NHI8IT

PROCESSOR TtS'

I$~e"t

UPi·.INHIBIT

MEMORV ~X~ANS!ON

,SAse" UP ••

·ISO~ATION

•• a,

oqO~oOT

,s~e',! uP~ •• SWITCH ERROR MESSIGtS TO

A!GH

S~E£D

PUNOH

, (USE

ON"'

Ir HfG~ sPtEO PUNC~ TESTING

Is INHleITED) ,sAe'li UP •••

R~START

pROGRAM

O~

rRROR

'I' THE

PROCESSER

UNOER

TEST

IS

IN 11/~5, SR12.e ENAB"!S TyE fOLLOWING'

'I~ TH£ ~Tll IS ~REseNT, ALL plssES

£XeEPT

0 AND 1 ARE RUN WIT~

,TAE

KT1& ON

I'

NOT

INHI81'tO;

(~w~, MUST BE DOWN IN THE 3~O

IDEVlce INHIBIT SETTING TO AlLOW USE

or

THE KT11)

INbTtl THE

PASS COUNT IS

GIVEN

TN OeT1L AND IS OISP~A'E~

IN

THE

lotSP"A'

REGISTER (POPwll/.' O~L9)~

Ilr THE PROCESSOR UNOER TEST IS

A

PDP.t1/40, SR12~a EN.e~ES tHE fOLLOWING;

,

I I I II~

pASS e,4,ETC

PASS

1,5,E'C PASS

2,6,E'C

PASS 3,7, ETC

KE~N~" MoDE, NO 'T' TRAp

~ERN£L MODE, t T' UAP USER MODE, NO t T' T~AP USER MODE, f TI TRA~

o

Ci

(~

110 U9 112 Hl 114 113 115 116

117 aa

119 120 121 122 123 124 125 126 121 128 H9 131 U0 132 133 134 135 136 131 138 139 140 141 142 143 144 145 146 lH 148

1~9

150 151 152 153 154 155 1'6 157 158 159 1U 161 162

ITO INHISIT INITIALI~A'ION

0'

DEVICE

INOTEI IF' NON.EXI5TENT DEVI~E I~ <ELECTED IN ANV OF TWE ITHREE DEVICE INHIBIT SETTINGS, A 8U~ PR~OR TRAP WILL OCCUR AND

,T~E PROGRAM WILL HAbT AT boc,TlnN 6 'ArTER STARTIN~ ADDRESS HAS ~E~N LCA~En ,SW~~'l INHIBIT OT11 BUS SWITCA ~ELErTfoN ,SW~!.l INHIBIT ~ULTI.PROCESSOR rEST!N~

ISW~2.1 INHIBIT ~Cll HSF

,SW~3.1 INHIBIT PC11 HSR

ISw040l INHIBIT KW11_L LINE CLOCK ISW05.1 INHIBIT CR11 CARD REAOFR

ISW0601 INHIBIT KWll.P pROGRAMMAOL[ "EAL TIME

e.er'

ISW0,o1 INHIBIT LPll LINE PRINTE" ~-_ If LINE PRIN'E" IS USE". MUST PEST ART IT ,SW2S" INHIBIT SECTION ONE &Nn

'W"

"F TWE BUS T(STEP !fACTOP' USt ONL') ,SW09H INHIBIT SECTION THREf AN" FO!lR OF THE BUS TESTER (fAtlOR' USE ONI VI ,SW1~-1 INHIBIT 8fl1 DISK

,Slil!-! INHIBIT UDell

ISW12~1 INHIBIT RCll DISK ,SW1J=1 INHIBIT Tell DECTARE ISW14=1 INHIBIT K"11 TTV OUT~UT

ISW15=1 INHIBIT K~11 TTV INPuT

INoTEI IF AL~ SWITCHES ARE "OWN F"R THIS FIRST QEVICE I~HI8!T IS~TTING, THE PREVIOUS~V CHO~EN MEvlrE~ WI"L BE TESTED ,.f.FR FIRST HI",

,SW0~'1 INHIBIT DCll .1 ;:;:V[C'OR 31' ISWll.1 INHIBIT OC11 #2 " ; ; VtcfOR ~1'

ISW02.i INHIBIT AA11 DAC W!TH scnPF "PTlnN ,SW0J.1 INHIBIT AfCl1 ANALOG MUL'IP"rxrR ,SWI4.1 INHIBIT RK11 DISK

,SWI5., INHIBIT ORlloB GENERAL I"TERFACE !N?o)

'SW06~1 INHI91T KE11_A (POP.f172') EXTENDED IRIT~METIC ELEMENT

ISW07~1 INHIBIT AO~l.D AID CONVE~TrR 'SW0e~t INHIBIT RP11 DISK

,SW09~1 INHIBIT RESERVED (PQ' eus LaTENc' TESTER)

'SW1~~1 INHIBIT nNl1 DIGITAL DIALER ,SW11.i INHIBIT TM11 MAGNETI~ TAPE

'SW12~1 INHIBIT M792'A (DIODE ~onT

rnR

PCll,KL11) ,SW13=1 INHIBIT M792VS (RF, 'C, OK '"0 TCll) 800T , OR MR11.0B BULK "OOT""A? ~OIDER

,Sw1.~1 INHIBIT ~Pl1 SVNCHROMOIIS LfNr UNIT --- VECTOR ~2~

ISW15.1 INHI81T OM11 ASVNCMRONOU~ MULTIpLEXER .-- VECTOR 330 IAPT(R SECOND HALT

,SW0~.1 INHIBIT KG11_A REOUNhANC' CHfCK OPTION Iswa1>! INHIBIT C011 CARD READER

JS~02.1 INHIBIT DR11_., OR11.C G~ENE"AL INTERFACE !INTERRUpT ONLY) ISW03=l INHI81T OM11_SS MODE" to-TROL ·ULTIPLEXEA

,SW04'1 INHIBIT VR20 2 COLOR 5eO.~ ODTtON ,SW05'1 INHIBIT MTl1 MEMOR' .'·A~E.E'T OPTIO'

ISW06~1 !NHISIT R~SE.VED

,SW07al INHIBIT RESERVED ,SW0S'i INHIBIT RESERVED ,SW0901 INHIBIT RESERVED

,SW1~'1 !NHISIT RESERVED ,SWll.i INHIBIT RESERVED ,SW12=1 INHIBIT RESERVED ,SW13=, INHIBIT RESERVED ,SW14=1 INHIBIT RESERVED ,SW1'=1 INHIBIT RESERVED

IA'TER HA~T SET SWITCHES FOR NOR"AL "U~NING (ALL DOWN) C"NTI.ur 'TRE fORMAT FOR A~L ERROR PRINTauT~ IS SEVEN COLUMNS

or

nA'A ,TAE SIGNIFICANCE OF EACH COLUMN IS rE!cRI8E~ BELOW

'CO~UMN 1. pC.2 OF THE TEST THAT FillEr

'COLUMN I . PROCESSOR STATUS IT THE TIME OF FAILURE

,COLUMN 3. PROCESSOR TEST IN PRO~R[S~ AT THE TIME OF FAILURE

ICO~UMN 4. STACK OFFSET

'COLUMN 5. rIRSr DEVICE SEkErT!o" (S"U REGISTER ICOLUMN 6. SECONe DEVICE SE~r.CYI"N «R?) REGISTER ,COLUMN 7. TH1RD DEVICE SE~ECT'O~ 11"31 REGISTER

'NOTEI IF A ~OWER EAI"URE OCCURS. A~ ERR~R MESSAGE WILL oE ,TVPED IN THE STANDARD fORMA' If'ER raWER UP OCCURES,

"~E PROGRAM WILL THEN 8EG!N EIE~U'l"N OF PRoCESSOR TEST 'AND NI~L COMP~ETE THE pRoeE"SOR TES' REFORE RE-!NITIAL!'ING

,SE~ECTED DEVICES, THIS OELIY 1< ~E"E.SAR' TO

,.C"ON MECWANICA~ DEVICES TO R!c"vrR '.0. THE POWER FA!LURE, 'NoTEI THE PROCESSOR STACK POINTER WILL BE srT To LoCA'ION I"STACK" EACH TIME THA' THE PROCESSOR 'EST IS STARTED, lA' THE END OF EACH "ASS, THE PArcrS'OR STACK POINTER W!LL IB! SET TO LOCATION ·STACKK"; IF THE PROCESSOR

,(-0'_11/45) IS OPERAT!NG IN OTHER THAN KERNFL MODE

"~E CURRENT MODE STACK POINtER WILL BE INITIALI1Ea TO .~TAC."

'AND THE KERNEL STAC~ POINTE" WILL SF ~ET TO .STACKK", INOTEI CORE EXPANSION MA' BE RUN WIT" A GTP OVERLAV, IF THAT IOVERLAY DOES ~OT REQUIRE MORE T"AN 4K or CO.E;

INoH'

,

I I

,

INOTEI

THE PROGRAM IS l'ITIA~I~ro WITH A SpECIFIC DEVICE REGISTER AND VECTOR AD~RrS~ AS·IGN~E.T FOR FLOATING VECTOR DEVICES, TO ACCO"ODATE OTHER CONFIGURATIONS, APPROPRIATE CHANGES ~HOU~D SE "AnE !" THE "DEVICE REGISTER AND VECTO. 'A_LE":

THE rOL~DWING OPTION" WILL BF TESTED UNCCNDITIONALLV Ir AVAILAeLF IPDP-11/40 EIS

'PBp-11/4~ FtS

'£NEA,~

'EIT

p~oaAAH ~ACY~11~P,4 24.0eT~73 2~121 ~AGE

4

DI'GAC~P~~

OPtRATING

I~ST~UeTloNS

163 ~u

165 166 1.67 161 1.69

H. i"

11116.111.

UU'I

e"18.

1111811

8'"''

87fU.

IPOP.U/4, PPP

Dans le document PRODUCT CODE: (Page 31-36)

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