real-time and embedded system

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Ensuring the sustainability of real-time embedded system under both QoS and Energy Constraints

Ensuring the sustainability of real-time embedded system under both QoS and Energy Constraints

thermoelectricity, etc... Therefore, it is interesting to target research towards environmental energy harvesting which could be considered as a promising approach to provide power for long term applications. Now, the challenge is to utilize the information about future harvested energy to maximize the overall Quality of Service (QoS) and still guaranteeing the sustainability of the system. In this paper, we consider a firm real-time embedded system which receives energy from the environment. The energy received is stored in an energy reservoir formed by either a battery or a super-capacitor. This energy reservoir is required to ensure the power requirements of the system even if no energy can be drawn from the environment. Our objective is to ensure the efficiency of the system and enhance the responsiveness of aperiodic task while still guaranteeing the Quality of Service (QoS) of the system according to the available energy level in the battery. The remainder of the paper is organized as follows. Section 2 gives the background material. Section 3 describes the model of the system. In Section 4 we describe our contribution with illustrative example.
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Real-Time Image Denoising with Embedded Deep Learning: Review, Perspectives and Application to Information System Security

Real-Time Image Denoising with Embedded Deep Learning: Review, Perspectives and Application to Information System Security

Deep learning algorithms have recently stood out from the crowd for solving many signal processing problems. These trained models have an extreme ability to fit complex prob- lems. Recent Graphics Processing Unit (GPU) architectures have been optimized to support deep learning workloads and have fostered ever deeper networks, extracting structured information from data and providing results where classical algorithms fail. The spread of deep learning has occurred in image denoising and several models initially developed for other purposes have been turned into denoisers [3]. Denoising Convolutionnal Neural Networks (DnCNNs) [4] are designed in this way. DnCNNs make use of Convolutional Neural Networks (CNNs) to blindly remove Gaussian noise, without prior knowledge on the noise level.
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Static Probabilistic Timing Analysis for Real-Time Embedded Systems in Presence of Faults

Static Probabilistic Timing Analysis for Real-Time Embedded Systems in Presence of Faults

(pWCETs) also provide the exceedance probability of a corresponding execution time. In other words, they tell us the probability of encountering a task exceeding a certain execution time to complete its computation. The vast majority of the research work that focus on WCET estimation techniques for either deterministic or probabilistic architectures is based on the assumption that the hardware is immune to randomly occurring faults. However, performance enhancing techniques—such as technology scaling—have a negative effect on a system’s reliability. Transistor shrinking can introduce process variations that increase the components’ probability of failure. The use of techniques for power consumption optimization, such as Dynamic Voltage Scaling (DVS), can also increase the failure probability of SRAM cells if the voltage is excessively reduced [117]. The study conducted in [83] paints a morbid picture of what we can expect in the future in terms of failure probabilities due to the scaling of components. The authors report that SRAM cells will be the most affected elements: the probability of failure they predict is 6.1 × 10 −13 at 45nm and will increase to 2.6 × 10 −04 at 12nm. Another study [58] underlined the issue by reporting that caches in particular will be a major source for performance degradation in future designs. For all of these reasons, we can no longer afford to ignore the effects of fault occurrence when estimating WCET bounds.
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Real time and interactive co-execution platform for the validation of embedded systems

Real time and interactive co-execution platform for the validation of embedded systems

For many years, industries have performed systems test by using real physical systems. Due to the complexity of the embedded electronic architecture of today’s systems, and to meet stringent safety constraints, train makers now have to make integration and validation tests on virtual test benches. Each discipline knows how to validate single pieces of equipment from a given supplier one by one and it is obviously simple using light test benches. Each equipment can be running correctly in a “stand alone” mode but many errors occur when all equipment are connected together in the complete system.
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Toward real-time embedded observer of unsteady fluid flow environment

Toward real-time embedded observer of unsteady fluid flow environment

First of all, such a dynamical system would need to resolve – in real time – enough spatio-temporal scales. On one hand, pure-data-driven fluid dynamics models (learned from e.g. least square, machine/deep learning) may not be accurate or robust enough. On the other hand, pure-physics-based model simulations (e.g. LES, RANS) are often too slow for real-time applications and can miss some important spatio-temporal scales. Reduced Order Models (ROM) are hence a good trade-off (see e.g. [9] for aeroelastic applications). In particular, the Proper Orthogonal Decomposition (POD) -Galerkin method relies on the physical equations while constraining the solution to live into a small subspace learned from data. Nevertheless, unsteady CFD ROM state of art is mainly limited to deterministic ROMs (often linear and/or with purely data-driven calibration) with weak prediction skills, especially because of the chaotic and intermittent nature of turbulence and of closure problems.
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A Three-Tier Approach for Composition of Real-Time Embedded Software Stacks

A Three-Tier Approach for Composition of Real-Time Embedded Software Stacks

components with temporal constraints, or performing inter-task communications (ITC). Problem statement. Many RTE Component Frameworks have been pro- posed to address these non-functional concerns [6, 9, 24]. However, these propo- sitions tend to provide their own abstractions, fixed set of execution and com- munication models, and their own ad-hoc runtime platforms. We believe that proposing more flexible solutions is a key issue to consider in order to improve reuse and integration of legacy solutions. Indeed, i) components can be indepen- dently deployed in heterogeneous execution contexts depending on embedded or temporal requirements. ii) Runtime platforms must be adapted according to new non-functional concerns as embedded systems must constantly integrate new functionalities. However, RTE constraints are tightly dependent on the run- time platform and on the underlying operating system since these layers must not induce a significant overhead concerning critical metrics of the domain, such as memory footprint, real-time responsiveness and execution time. The respect of these constraints is thus a prerequisite for introducing flexibility in embedded software stacks.
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The SANDRA project: cooperative architecture/compiler technology for embedded real-time streaming applications

The SANDRA project: cooperative architecture/compiler technology for embedded real-time streaming applications

In our scheme, the coordination of tasks operating in the same subsystem is performed by a single controller, which delegates the control of individual tasks to the next level of the hierarchy. This mechanism is again used to control sub-tasks inside each of the top-level tasks, and can be recursively repeated for as many levels as required. Conversely, tasks with independent clock domains may be executed by different controllers without unnecessary synchronisations. Finer-grain (thus, higher-frequency) tasks have a strict latency and bandwidth requirements: they require fast ac- cess to data and a high storage bandwidth. Conversely, coarse-grain tasks can tolerate long latencies and a lower bandwidth to the rest of the system. This fact is reflected in the memory and communication structure of S ANDRA . The lowest levels of the system hierarchy use small, fast memories fully interconnected with relatively simple oper- ators (FIR filters, etc.). Higher levels of the hierarchy offer a lower number of larger memories, and communicate through a higher-latency, lower-throughput network. In this way, both the locality of data references and the natural synchronization of tasks at each level can be fully exploited within a unified system organization.
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Modeling with logical time in UML for real-time embedded system design

Modeling with logical time in UML for real-time embedded system design

Timed models inside application instead. The downscaling application has been modeled with Multi-Periodic Process Networks [6], a model influenced by Petri nets, data-flow graphs, and Kahn Process Networks. A HD image consists of 1080 lines, each made of 1920 pixels. A SD image has 720 lines with 480 pixels each. The transformation reduces the number of pixels per line (ratio of 8:3), and the number of lines (ratio of 9:4). So, altogether the output pixel rate is 3 8 × 4 9 = 1 6 of the input rate. Functionally, the transformation can be decomposed in the horizontal filtering of each HD lines, followed by the vertical filtering of the resulting lines. Filtering includes smoothing (each new pixel results from a weighted sum of a neighborhood) and a decimation (discarding pixels). This transformation must be done in real-time: the pixels of input HD image are received at a rate imposed by the inClk clock, and the pixels of the output SD image have to be delivered at a rate imposed by the outClk clock. The two clock frequencies are specified in the standards. At the implementation level, horizontal and vertical filterings are performed in a pipe-line mode, which calls for a precise schedule of elementary operations. For simplicity we describe only the horizontal filtering.
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A dedicated micro-kernel to combine real-time and stream applications on embedded manycores

A dedicated micro-kernel to combine real-time and stream applications on embedded manycores

A more radical (but non exclusive) way to conceive mixed criticalities is through virtualization: a hypervisor manages the hardware resources, and provides real-time guarantees to one or several of its Virtual Machines (VMs). Real-time extensions were brought to the major hypervisors of the Linux world, namely KVM [10, 11] and Xen [12], but they only support soft real-time tasks. In [13] however, Lee et al. use compositional scheduling in RT-Xen to run some classes of hard real-time tasks. Outside the Linux world, [14] proposes a dedicated real- time micro-kernel with strict resource sharing policies, able to run a para-virtualized Linux host next to hard real time tasks. Also, several proprietary solutions exist such as the real-time hypervisors of National Instruments or of WindRiver; unfortunately only “commercial” documentation is available. Both allow running para- or fully- virtualized general purposes OSes such as Windows or Linux, next to hard real-time bare applications or RTOSes. However the core shielding appears to be strict: no best-e ffort VM may run on RT-cores. In a general way, virtualization is more flexible but clearly less e fficient than our micro-kernel solution, as it supposes managing multiple OSes on a single system. However, the fast evolution of mobile processors may make virtualization viable for embedded real-time systems in the future – especially if dedicated instruction sets like Intel’s VT-x or AMD-V are developed.
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Real-time performance analysis of a QoS based industrial embedded network

Real-time performance analysis of a QoS based industrial embedded network

Exhaustive analysis approach This approach performs an exhaustive analysis on all the possible scenarios of frame sequences at each output port to find the worst-case scenario. It is based on Model Checking (mc). This approach has the main advantage of computing the exact worst-case delays. MC approach [BBF + 10] is based on formal verification method. It develops a model based on the system properties to performs a reachability analysis. There exist different formalisms for modelling the system. For instance, timed automata [AD94] describe the system behaviour with times. This model is composed of a set of finite automata with a set of clocks. The preliminary approach proposed in the context of an avionic switched Ethernet [CSEF06] is limited to a network configuration with up to 8 flows. This limitation is due to the fact that with the increase in the size of the network, the number of scenarios to be tested becomes very large and quickly leads toward the combinatorial explosion problem. In [ASF11, ASEF12], some properties are introduced to drastically reduce the number of scenarios to be analysed. The idea is to consider only the scenarios which are candidates to the worst- case. The resulting reduction allows the computation of exact worst-case delay for network configurations with up to 60 flows. However, up to now, this approach cannot cope with industrial size configurations (1000+ flows).
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Real time self-mixing interferometric laser sensor for embedded applications

Real time self-mixing interferometric laser sensor for embedded applications

3 Univ de Toulouse, INP, LAAS, F-31400 Toulouse, France E-mail: usman.zabit@riphah.edu.pk Abstract. A Self-Mixing (SM) interferometric laser displacement sensor is presented that is capable of providing correct target measurement in real-time even when it is subject to extraneous parasitic movements. The sensor achieves such robustness by using an embedded MEMS Solid-State Accelerometer (SSA) that has been coupled with the laser sensor. The SSA thus measures the extraneous movement acting on the laser sensor and this information is used to provide correct sensing. The proposed SSA-SM sensing system uses Consecutive-Samples based Unwrapping (CSU) to process the SM interferometric signal while a Digital Signal Processor (DSP) takes care of band-pass filtering, double integration as well as phase and gain corrections needed for the acceleration signal. Hence, a compact, real-time, precise and self- aligned SSA-SM sensor has been designed that has a displacement measurement precision of approximately 100 nm with a parasitic movement elimination of 31dB for a laser diode emitting at 785 nm.
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Robust feature extraction algorithm suitable for real-time embedded applications

Robust feature extraction algorithm suitable for real-time embedded applications

1.1 Visual features for smart cameras Local feature detection is an image processing operation that aims to deliver medium-level abstractions from an image, and often it is used as initial step of several com- puter vision algorithms. In previous work, several local visual feature detection algorithms were proposed: algo- rithms such as Canny or Sobel [ 10 ], deliver image edges that often are used in applications like object detec- tion [ 13 ], image labeling[ 50 ], image segmentation [ 27 ], stereo vision [ 41 ], etc. Other algorithms are corner de- tection like Shi & Tomasi [ 36 ], Harris & Stephens [ 21 ], FAST [ 35 ], and they are the cornerstone of several com- puter vision applications such as, 3D reconstruction [ 39 ], camera calibration [ 49 ], Structure from Motion (SfM) [ 40 ], Simultaneous Localization and Mapping (SLAM), etc. Nowadays desktop computers can process most of the corner detection algorithms in real-time. Unfortu- nately, in some cases (mobile applications, autonomous robotics and compact smart vision systems) such ap- proaches could be low efficient since they require rel- atively high computational resources, then power con- sumption and sizes can be not compatible with an em- bedded system. One solution to this problem is the use of dedicated hardware as Field Programmable Gate Ar- rays (FPGAs). This is because FPGAs are devices with low power consumption and its size is small (suitable to embedded/mobile applications). In addition, FPGAs are structured as a customizable circuit where image pro- cessing operations can be performed in parallel using a data-flow formalism. For corner detection , in previ- ous work several FPGA-based smart cameras have in- tegrated corner detection algorithms [ 6 , 2 , 7 ] inside the camera fabric, as result, these cameras can simplify the formulation of applications like 3D reconstruction, SfM, object tracking and camera calibration [ 39 , 49 , 40 ]. This is because in these algorithms the first step is for visual feature extraction, considering that the sensor (smart camera) deliver images and feature extraction simulta- neously, then, the problem become partially solved. i.e., in all cases the first step of the algorithmic formulation become solved.
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ARTE: a Simulation Tool for Reconfigurable Energy Harvesting Real-time Embedded Systems

ARTE: a Simulation Tool for Reconfigurable Energy Harvesting Real-time Embedded Systems

extensible tool. It is a real-time multiprocessor scheduling simulator which provides various functions to simulate the scheduling process of real-time task sets and their temporal behavior when a scheduling policy is used. Functionalities of YARTISS: 1) simulate a task set on one or several processors while monitoring the system energy consumption, 2) concurrently simulate a large number of tasksets and present the results in a user friendly way that permits us to isolate interesting cases, and 3) ran- domly generate a large number of task sets. However, none of these simulation tools provide support for unpredictable reconfiguration scenarios yet. To date, only a few recent works target the real-time scheduling issue in reconfigurable systems. In [15] a simulator tool is proposed for Reconfigurable Battery-Powered Real-Time Systems Reconf-Pack. Reconf-Pack is a simulation tool for analyzing a reconfiguration and applying the proposed strategy for real-time systems. It is based upon another tool Task-Generator which generates random tasks. According to the state of the system after a reconfiguration, Reconf-Pack calculates dynamically a deterministic solution. Moreover, it compares the pack-based solutions to related works. However, it seems to suffer from the following issues: its development is not open to other developers for now, and isn’t available for download.
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Stabilization of an Unmanned Aerial Vehicle Using Real-Time Embedded Motion Estimation

Stabilization of an Unmanned Aerial Vehicle Using Real-Time Embedded Motion Estimation

Fig. 1. Algorithm architecture. The left side contains the image processing and match extraction methods whilst the right side contains the state estimation and data fusion methods For our tracking system to perform well, it is necessary to add new features when there are not enough tracked features in the database. This occurs when the algorithm is initialized and when the scenery beneath the UAV changes. To do this, an exploration routine whose effort is linked to the number of required new points was developed. To meet real-time constraints, exploration is spread over successive images and uses a heuristic approach to choose the exploration zones. For this purpose, previous explorations are kept in memory and the effort is intensified in unexplored zones or that have remained unexplored for a long time. The predicted movement is also used to locate the unexplored zones. Finally, exploration of zones containing tracked features are avoided to spread out the tracked points over the entire scene. C. Motion Estimation Equations
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A Real-Time Scheduling Framework for Embedded Systems with Environmental Energy Harvesting

A Real-Time Scheduling Framework for Embedded Systems with Environmental Energy Harvesting

Nowdays, higher energy-density batteries and supercapacitors are being de- veloped but the amount of energy available still severely limits the system’s lifespan. On the other hand, in most wireless applications including sensor networks, recharging or replacing batteries is not practical or permitted and consequently alternative power sources which are present in the environment should be employed. Environmental energy harvesting is deemed a promising approach because many sensing environments provide sufficient energy that can be harvested for providing power on an infinite time [13]. Several tech- nologies to extract energy from the environment have been demonstrated in- cluding solar, motion-based, biochemical, and vibrational energies and many others are being developed [11]. Energy harvesting is the conversion of am- bient energy into electricity to power small electric and electronic devices, making them self-sufficient, often for decades. A key consideration that af- fects power management in an energy harvesting system is that instead of minimizing the energy consumption and maximizing the lifetime achieved as in classical energy storage operated devices, the system operates in a so- called energy neutral mode by consuming only as much energy as harvested [19].
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A multiform time approach to real-time system modeling: Application to an automotive system

A multiform time approach to real-time system modeling: Application to an automotive system

RTE systems have specific demands. Real-time systems, on the one hand, require constructs to model time-dependent events and behaviors, as well as constraints on event occurrences and execution durations. On the other hand, embedded systems are subject to additional constraints due to limited resource availability. UML 2.0 offers constructs to represent events and behaviors, and to express constraints. However, the UML model of time has purposely been kept simple; UML delegates to appropriate profiles the management of complex time mechanisms. Some profiles attempt to provide such mechanisms, but time-related concepts are often expressed as simple annotations. In our approach, time is part of the behavior, not a mere annotation. Moreover, our notion of time covers both physical and logical times. Multiform time, originating from reactive system modeling, is our time model.
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Online fault tolerant task scheduling for real-time multiprocessor embedded systems

Online fault tolerant task scheduling for real-time multiprocessor embedded systems

Introduction of restricted scheduling windows, the one of limitation on the number of comparisons, and the one of several scheduling attempts. Chapters 4 and 5 deal with small satellites called CubeSats. Chapter 4 introduces and classifies them among other satellites according to their weight and size. We also mention the advent and show their progressive popularity and their missions. Next, we describe the space environment and how CubeSats are vulnerable to faults. Finally, we sum up the methods currently used to provide CubeSats with fault tolerance. To overcome the harsh space environment, Chapter 5 presents a solution to improve the CubeSat reliability. To analyse its performances, the system, task and fault models are defined and the three proposed scheduling algorithms are introduced. While the first two presented algorithms do not take energy constraints into account, the last devised algorithm is energy-aware. After the description of the experimental frameworks, the results in a fault-free and harsh environments are discussed.
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Task Scheduling in Energy Harvesting Real-time Embedded Systems

Task Scheduling in Energy Harvesting Real-time Embedded Systems

L’UNAM University–IRCCyN (Institut de Recherche en Communications et Cybernétique de Nantes), UMR CNRS 6597, Nantes, France Abstract Harvesting energy from the environment is very desirable for many emerging applications that use embedded devices. Energy harvesting also known as energy scavenging enables us to guarantee quasi-perpetual system operation for wireless sensors, medical implants, etc. without requiring human intervention which is normally necessary for recharging batteries in classical battery-operated systems. Nevertheless, energy harvesting calls for solving numerous technological problems in relation with chemistry when batteries are used for temporary energy storage for example, power management of the embedded computing system that consumes the energy, etc. And this latter problem becomes more complex when the embedded system has real-time constraints i.e. deadlines attached to computations. This paper surveys the main issues involved in designing energy harvesting embedded systems that present strict timing requirements.
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Modeling and scheduling embedded real-time systems using Synchronous Data Flow Graphs

Modeling and scheduling embedded real-time systems using Synchronous Data Flow Graphs

1.1 Contributions In this section, we summarize the research contribution of this thesis. The first contribution consists in defining a general and intuitive communication model for multi-periodic systems. Based on the precedence constraints between the tasks executions, we demonstrate that the communications between multi-periodic tasks can be directly expressed as a “Synchronous Data-flow Graph”. The size of this graph is equal to the application size. We called this particular class “Real-Time Synchronous Data-flow Graphs”. These results were published in a short paper in “Ecole d’été temps réel”(ETR 2015). In collaboration with Cedric Klikpo (projet ELA, IRT SystemX), we showed that the communications of an application expressed with Simulink can be modeled by a SDFG. This transformation led to an article published in RTAS 2016 [76]. The second contribution consists in evaluating the worst-case latency of multi- periodic systems. Based on our communication model, we define and compute the latency between two communicating tasks. We prove that minimum and maximum latency between the tasks executions can be computed according to the tasks parame- ters using closed formulas. Moreover, we bounded their values according to the tasks periods. In order to evaluate the worst-case system latency, we propose an exact pricing algorithm. This method computes the system latency in terms of the average repetition factor. This implies that if this factor is not bounded, the complexity of the exact evaluation increases exponentially. Consequently, we propose two polynomial-time algorithms that compute respectively the upper and lower bounds of this latency. This evaluation led to an article published in RTNS 2016 [73].
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Embedded Real-Time Virtualization Technology for Reconfigurable Platforms

Embedded Real-Time Virtualization Technology for Reconfigurable Platforms

Figure 3.11 – The interaction between the PPR monitor and the Virtual Device Manager to search for appropriate allocation solutions. the PPR Monitor always chooses the highest priority request. An important issue about the preemption mechanism of accelerators is that it may influence the scheduability of VM tasks. Since the priority of requests is equal to the VM priority, which makes it possible that a high-priority RTOS task can be blocked by low- priority task. This problem can be fixed by using a more sophisticated scheduling policy of HW tasks, for example, using "sub-priority" to indicate the task priorities in order to avoid the priority inversion/blocking issues of RTOS tasks. However, such a mechanism will significantly increase the complexity of scheduling algorithm of multiple HW tasks on multiple PRR containers. The preemption of HW tasks is unlike software ones, since their stopping and reconfiguration tasks extra overheads (sometimes quite big). All these factors will introduce high complexity in the real-time schedule for VM users, since the task execution in such a system is quite difficult to predict beforehand. Therefore, to keep the behavior of critical tasks predictable, we assume that the FPGA resources are always sufficient for the high-priority VM, whereas they can also be shared and reused by low-priority VMs. This assumption seems reasonable in practice, since critical tasks are pre-determined in most embedded systems.
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