Atomic read/write registers

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Anonymous Obstruction-free $(n,k)$-Set Agreement with $n-k+1$  Atomic Read/Write Registers

Anonymous Obstruction-free $(n,k)$-Set Agreement with $n-k+1$ Atomic Read/Write Registers

Considering a system of n anonymous asynchronous processes, which communicate through atomic read/write registers only, and where any number of processes may crash, this paper addresses and solves the challenging open problem of designing an obstruction-free k-set agreement algorithm with (n − k + 1) atomic registers only. From a shared memory cost point of view, this algorithm is the best algorithm known so far, thereby establishing a new upper bound on the number of registers needed to solve the problem (its gain is (n − k) with respect to the previous upper bound). The algorithm is then extended to address the repeated version of (n, k)-set agreement. As it is optimal in the number of atomic read/write registers, this algorithm closes the gap on previously established lower/upper bounds for both the anonymous and non-anonymous versions of the repeated (n, k)-set agreement problem. Finally, for 1 ≤ x ≤ k < n, a generalization suited to x-obstruction-freedom is also described, which requires (n − k + x) atomic registers only.
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Anonymous obstruction-free (n,k)-set agreement with n−k+1 atomic read/write registers

Anonymous obstruction-free (n,k)-set agreement with n−k+1 atomic read/write registers

Consider a system of n anonymous asynchronous processes that communicate only through atomic read/write registers, and such that any number of them may crash. This paper addresses and solves the challenging open problem of designing an obstruction-free k-set agreement algorithm with only (n − k + 1) atomic registers. From a shared memory cost point of view, our algorithm is the best algorithm known to date, thereby establishing a new upper bound on the number of registers needed to solve this problem. For the consensus case (k = 1), the proposed algorithm is up to an additive factor of 1 close to the best known lower bound. The paper extends then this algorithm to obtain an x-obstruction-free solution to the k-set agreement problem that employs (n−k+x) atomic registers (with 1 ≤ x ≤ k < n), as well as a space-optimal solution for the repeated version of k-set agreement. Using this last extension, we prove that n registers are enough for every colorless task that is obstruction-free solvable with identifiers and any number of registers.
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Brief Announcement: Anonymous Obstruction-free (n, k)-Set Agreement with n−k+1 Atomic Read/Write Registers

Brief Announcement: Anonymous Obstruction-free (n, k)-Set Agreement with n−k+1 Atomic Read/Write Registers

University of Neuchâtel, Switzerland Abstract. This paper presents an obstruction-free solution to the (n, k)-set agree- ment problem in an asynchronous anonymous read/write system using solely (n − k + 1) registers. We then extend this algorithm into (i) a space-optimal so- lution for the repeated version of (n, k)-set agreement, and (ii) an x-obstruction- free solution using (n − k + x) atomic registers (with 1 ≤ x ≤ k < n).

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Two-Bit Messages are Sufficient to Implement Atomic Read/Write Registers in Crash-prone Systems

Two-Bit Messages are Sufficient to Implement Atomic Read/Write Registers in Crash-prone Systems

Several types of registers can be defined according to which processes are allowed to read or write the register, and the quality (semantics) of the value returned by each read operation. We consider here registers which are single-writer multi-reader (SWMR), and atomic. Atomicity means that (a) each read or write operation appears as if it had been executed instantaneously at a single point of the time line, between its start event and its end event, (b) no two operations appear at the same point of the time line, and (c) a read returns the value written by the closest preceding write operation (or the initial value of the register if there is no preceding write) [10]. Algorithms building multi-writer multi-reader (MWMR) atomic registers from single-writer single-reader (SWSR) registers with a weaker semantics (safe or regular registers) have been introduced by L. Lamport in [10, 11] (such algorithms are described in several papers and textbooks, e.g., [4, 12, 18, 21]).
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Two-Bit Messages are Sufficient to Implement Atomic Read/Write Registers in Crash-prone Systems

Two-Bit Messages are Sufficient to Implement Atomic Read/Write Registers in Crash-prone Systems

Several types of registers can be defined according to which processes are allowed to read or write the register, and the quality (semantics) of the value returned by each read operation. We consider here registers which are single-writer multi-reader (SWMR), and atomic. Atomicity means that (a) each read or write operation appears as if it had been executed instantaneously at a single point of the time line, between its start event and its end event, (b) no two operations appear at the same point of the time line, and (c) a read returns the value written by the closest preceding write operation (or the initial value of the register if there is no preceding write) [10]. Algorithms building multi-writer multi-reader (MWMR) atomic registers from single-writer single-reader (SWSR) registers with a weaker semantics (safe or regular registers) have been introduced by L. Lamport in [10, 11] (such algorithms are described in several papers and textbooks, e.g., [4, 12, 18, 21]).
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Another Look at the Implementation of Read/write Registers in Crash-prone Asynchronous Message-Passing Systems (Extended Version)

Another Look at the Implementation of Read/write Registers in Crash-prone Asynchronous Message-Passing Systems (Extended Version)

“Yet another paper on” the implementation of read/write registers in crash-prone asynchronous message- passing systems! Yes..., but, differently from its predecessors, this paper looks for a communication ab- straction which captures the essence of such an implementation in the same sense that total order broadcast can be associated with consensus, or message causal delivery can be associated with causal read/write reg- isters. To this end, the paper introduces a new communication abstraction, named SCD-broadcast (SCD standing for “Set Constrained Delivery”), which, instead of a single message, delivers to processes sets of messages (whose size can be arbitrary), such that the sequences of message sets delivered to any two processes satisfies some constraints. The paper then shows that: (a) SCD-broadcast allows for a very simple implementation of a snapshot object (and consequently also of atomic read/write registers) in crash- prone asynchronous message-passing systems; (b) SCD-broadcast can be built from snapshot objects (hence SCD-broadcast and snapshot objects –or read/write registers– are “computationally equivalent”); (c) SCD- broadcast can be built in message-passing systems where any minority of processes may crash (which is the weakest assumption on the number of possible process crashes needed to implement a read/write register).
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Atomic Read/Write Memory in Signature-free Byzantine Asynchronous Message-passing Systems

Atomic Read/Write Memory in Signature-free Byzantine Asynchronous Message-passing Systems

Content of the paper This paper presents a new algorithm implementing an array of n SWMR atomic read/write registers (one per process) in an asynchronous message-passing system where up to t < n/3 processes may commit Byzantine failures. This algorithm does not require to enrich the underlying system with cryptography-based techniques. When designing this algorithm, an aim was to obtain an algorithm whose “spirit” is ”as close as possible” to ABD. We think that this is important from both understanding and pedagogical point of views. It helps better understand the “gap” between crash failures and Byzantine failures. From an algorithmic point of view, we have the following:
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A separation of (n -1)-consensus and n-consensus in read-write shared-memory systems

A separation of (n -1)-consensus and n-consensus in read-write shared-memory systems

sensus algorithm in which all correct processes terminate in any schedule such that some process takes enough atomic steps solo to run alone during 2n + 1 successive iterations of the main loop. The algorithm in [?] gives a wait-free implementation of a multi-writer snapshot array from MWMR registers. For this algorithm there exists a constant C 1 such that each update or scan operation requires less than C 1 n 2

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Time-Efficient Read/Write Register in Crash-prone Asynchronous Message-Passing Systems

Time-Efficient Read/Write Register in Crash-prone Asynchronous Message-Passing Systems

Several types of registers can be defined according to which processes are allowed to read or write it, and the quality (semantics) of the value returned by each read operation. We consider here registers which are single-writer multi-reader (SWMR), and atomic. Atomicity means that (a) each read or write operation appears as if it had been executed instantaneously at a single point of the time line, between is start event and its end event, (b) no two operations appear at the same point of the time line, and (c) a read returns the value written by the closest preceding write operation (or the initial value of the register if there is no preceding write) [8]. Algorithms building multi-writer multi-reader (MWMR) atomic registers from single-writer single-reader (SWSR) registers with a weaker semantics (safe or regular registers) are described in several textbooks (e.g., [3, 9, 12]).
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Time-Efficient Read/Write Register in Crash-prone Asynchronous Message-Passing Systems

Time-Efficient Read/Write Register in Crash-prone Asynchronous Message-Passing Systems

Register in message-passing systems. In a message-passing system, the computing entities communicate only by sending and receiving messages transmitted through a communication network. Hence, in such a system, a register is not a communication object given for free, but constitutes a communication abstraction which must be built with the help of the communication network and the local memories of the processes. Several types of registers can be defined according to which processes are allowed to read or write it, and the quality (semantics) of the value returned by each read operation. We consider here registers which are single-writer multi-reader (SWMR) and atomic. Atomicity means that (a) each read or write operation appears as if it had been executed instantaneously at a single point of the time line, between is start event and its end event, (b) no two operations appear at the same point of the time line, and (c) a read returns the value written by the closest preceding write operation (or the initial value of the register if there is no preceding write) [9]. Algorithms building multi-writer multi-reader (MWMR) atomic registers from single-writer single-reader (SWSR) registers with a weaker semantics (safe or regular registers) are described in several textbooks (e.g., [3, 10, 13]).
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Time-Efficient Read/Write Register in Crash-Prone Asynchronous Message-Passing Systems

Time-Efficient Read/Write Register in Crash-Prone Asynchronous Message-Passing Systems

Several types of registers can be defined according to which processes are allowed to read or write it, and the quality (semantics) of the value returned by each read operation. We consider here registers which are single-writer multi-reader (SWMR), and atomic. Atomicity means that (a) each read or write operation appears as if it had been executed instantaneously at a single point of the time line, between is start event and its end event, (b) no two operations appear at the same point of the time line, and (c) a read returns the value written by the closest preceding write operation (or the initial value of the register if there is no preceding write) [8]. Algorithms building multi-writer multi-reader (MWMR) atomic registers from single-writer single-reader (SWSR) registers with a weaker semantics (safe or regular registers) are described in several textbooks (e.g., [3, 9, 12]).
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HGP-write : après la lecture, l’écriture ? - Chroniques génomiques

HGP-write : après la lecture, l’écriture ? - Chroniques génomiques

III de S. cerevisiae. La tâche – séquencer l’ensemble du génome humain – semblait pour beaucoup hors de por- tée ; pourtant elle fut réalisée en une dizaine d’années, et personne ne peut aujourd’hui nier qu’elle ait révo- lutionné la Biologie. Il est évidemment tentant, et les auteurs ne s’en privent pas, d’insister sur ce parallèle et d’affirmer que le projet HGP-write 3 impulsera une

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Thirteen Ways to Write an Abstract

Thirteen Ways to Write an Abstract

Such abstracts can be commonly found in medical journals and in some journals in the social sciences. As shown in the example above, such abstracts usually contain more details than traditional ones. One particular detail not mentioned in the abstract above (because of the nature of the study) is the number of participants involved and their sex (see [ 3 ]). More detailed accounts of the development and use of structured abstracts can be found elsewhere [ 1 , 4 , 5 ]. In some journals, the text is run on continuously, but as shown above, it is easier to read the abstract when it is appropriately spaced.
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De HGP-write aux « super-cellules » - Chroniques génomiques

De HGP-write aux « super-cellules » - Chroniques génomiques

To make ultra-safe cells, specific redundant codons would have to be removed from all 20,000 genes in the genome. The organizers plan to complete the project within 10 years Figure 1. Comparaison du recodage d’Escherichia coli pour un codon (à gauche), sept codons (au centre), avec le recodage du génome humain (extrait du site de HGP-write : http://engineeringbiologycenter.org/ultrasafecells/).

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Minimization of circuit registers: retiming revisited

Minimization of circuit registers: retiming revisited

construction of the associated unfolded graph is given in Figure 4.b) The size of the maximal flow is 4. This means that one can find an equivalent circuit with 4 registers. The shape of the corresponding splinter gives the retiming to be applied. Duplicating node 1 finishes the construction of the circuit, displayed in Figure 4.c) which is equivalent to the initial circuit up to the bijection θ which maps the sequence of values computed in node 3 to the same sequence in the initial circuit, shifted by one.

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Thirteen Ways to Write an Abstract

Thirteen Ways to Write an Abstract

Such abstracts can be commonly found in medical journals and in some journals in the social sciences. As shown in the example above, such abstracts usually contain more details than traditional ones. One particular detail not mentioned in the abstract above (because of the nature of the study) is the number of participants involved and their sex (see [ 3 ]). More detailed accounts of the development and use of structured abstracts can be found elsewhere [ 1 , 4 , 5 ]. In some journals, the text is run on continuously, but as shown above, it is easier to read the abstract when it is appropriately spaced.
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Perspectives actuelles sur l’apprentissage de la lecture et de l’écriture / Contributions about learning to read and write - Actes du Symposium international sur la litéracie à l’école / International Symposium for Educational Literacy (SILE/ISEL) 2015

Perspectives actuelles sur l’apprentissage de la lecture et de l’écriture / Contributions about learning to read and write - Actes du Symposium international sur la litéracie à l’école / International Symposium for Educational Literacy (SILE/ISEL) 2015

Background It is now well established in different languages with alphabetic orthographies, that letter knowledge and phoneme awareness are important prerequisite skills that work in reciprocal alliance to pro- mote beginning reading in children (see review in Caravolas & Samara, 2015). By letter knowledge, we mean the ability to recognize and pronounce letters by their sounds and names, as well as to write letters to dictation. Typically, preschool children learning alphabetic orthographies know some letters before they are taught formally in school, although differences exist in the extent to which informal letter learning practices occur in different countries (e.g., Caravolas et al., 2012; Hulme, Ca- ravolas, Málková, & Bridgstocke, 2005; Levin, Patel, Margalit, & Barad, 2002; Treiman Jackiw, & Gross, 2015). In this paper, we use the term letter knowledge as “an umbrella” term that includes knowledge of both letter sounds and letter names. Phoneme awareness refers to a variety of meta-linguistic skills, requiring explicit or implicit awareness of the smallest unit of spoken language:the phoneme (e.g., Gillon, 2004). It develops gradually throughout childhood, but accelerates in the preschool years. In general, children are said to progress from having implicit phonological knowledge, that for example enables a child to discriminate acceptable and unacceptable variations of a spoken word, through to the capacity to explicitly manipulate phonemes in words. A long-standing question asks what creates children ability to manipulate phonemes, given the abstract and variable nature of these speech units (Bentin, 1992; Castles & Coltheart, 2004; Fowler, 1991). Three main theoretical hypotheses have been proposed to explain the origins of the strong developmental association of phoneme awareness and letter knowledge.
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Read mapping on de Bruijn graphs

Read mapping on de Bruijn graphs

This mapping procedure is performed only if the two extremities of the read are mapped by two unitigs. The extreme overlaps of the read enables BGREAT to quickly filter out unmappable reads. For doing this, the first (resp. last) overlap of the read is used to align the read to the first (resp. last) unitig. Note that, as polymorphism exists between the read and the graph, some of the overlaps present on the read may be spurious. In this case the alignment fails, and the algorithm continues with the next (resp. previous) overlap. At most n alignment failures are authorized in each direction. If a read cannot be anchored neither on the left, nor on the right, it is considered as not aligned to the graph.
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Allocating Registers in Multiple Instruction-Issuing Processors

Allocating Registers in Multiple Instruction-Issuing Processors

Unité de recherche INRIA Lorraine, Technopôle de Nancy-Brabois, Campus scientifique, 615 rue du Jardin Botanique, BP 101, 54600 VILLERS LÈS NANCY Unité de recherche INRIA Rennes, Irisa, [r]

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Atomic Beams

Atomic Beams

Three significant steps in the building of the apparatus for measuring the velocity of light can now be reported: the completion of the main mechanical elements [r]

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