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Architectural support to exploit commutativity in shared-memory systems

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Academic year: 2021

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Figure

Figure  1.1:  Example  comparing  the  cost  of commutative  updates  under  two  schemes
Figure  1.2:  Example  comparing  (a)  a conventional  HTM  and  (b)  COMMTM.  Transactions  XO-X4  increment a  shared  counter,  and  X5  reads  it
Figure  2.1:  Performance  of parallel  histogram  implementations  using  atomics,  software  privatization, and  Coup
Figure  2.2:  With  remote  memory  operations,  cores  send  updates  to  a  fixed  location,  the  shared  cache  in this case.
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