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22FDX

®

Technologies for Ultra-Low Power IoT, RF

and mmWave Applications

Technologies 22FDX® pour les Applications très basse puissance IoT, RF 

et Ondes Millimétriques 

Jan Hoentschel1, Luca Pirro1, Rick Carter1, Manfred Horstmann1

1 Globalfoundries LLC Fab1, Wilschdorfer Landstrasse 101, 01109 Dresden, Jan.Hoentschel@globalfoundries.com

ABSTRACT. In this work we revisited the 22nm FDSOI technology for lowest power IoT, RF and mmWave applications. Ultra-low leakage and power devices are described, as part of the 22FDX® portfolio. Transistors performance is presented. N-FET (p-FET) drive current of 910μA/μm (856μA/μm) at 0.8V and 100pA/μm Ioff are reported fulfilling the requirements for ultra-low power and leakage design space. Excellent low noise is shown due to the suppressed RDF coming from the un-doped silicon channel. Superior fT and fmax have been measured on CMOS and LDMOS devices. 347GHz n-FET fT and 371GHz fmax were achieved on thin oxide CMOS devices. Simple PA circuit results are reported to highlight the benefit of 22FDX® technology for RF and mmWave applications. In conclusion, an outlook of the scalability as well as novel process integrations are discussed.

KEYWORDS. CMOS, FDSOI, analog, mixed-signal, RF, mmWave, ultra-low power, ultra-low leakage, RTS, LFN. 1. Introduction

Rising manufacturing costs and emerging applications require unparalleled energy efficiency and driving the need for new semiconductor device solutions [Pat 98]. An increase in the cost per die was observed with the introduction of 14/7nm FinFET technologies due to increased process complexity and mask count. Cost sensitive IoT and mobile applications drive new requirements such as increased integration, advanced power management and high RF/mmWave performance. Consequently, differentiated technologies have continually received and increased focus from the major design and foundry players [Pat 98].

The Fully Depleted Silicon-On-Insulator (FDSOI) transistor architecture has inherent electrostatic control benefits, very low mismatch capability and low parasitic capacitance, making it a powerful option to fulfil those requirements while keeping process costs and complexity low [Web 15, Maz 11]. 22FDX® technology is proven to be a versatile platform, able to co-integrate a wide spectrum of devices, addressing a variety of market segments including Mobile, IoT, analog and RF/mmWave [Car 16].

In this work we revisit the 22FDX® technology as a solid platform offer. A review of the integration process and core IoT FET performances is presented in section 2 and 3. Section 4 highlights the differentiation of the 22FDX® technology. Ultra-low leakage and power devices are discussed in section 4.1 followed by a summary of low frequency noise performance (sec. 4.2). RF and mmWave results, which are obtained on single device and circuit are discussed in sections 4.3 - 4.5. In conclusion, section 5 gives an outlook on how new integration schemes will extend the 22nm FDSOI platform technology in the future.

2. Process Integration

The 22FDX® technology leverages about 75% of the 28nm bulk technology processes enabling a high yield capability [Car 16]. Maximum die scaling is achieved compared to 28nm bulk technologies with the use of double-patterning steps in the Mid/Back-End-of-Line leading to an optimum trade-off

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N-well, optim Int (RDS, large temp break for a make volta RDS,o or 6.5 Table 4.5. 2 To and L 28GH outpu a Ga loss ( also [Zha poly shie mization, a Figure 4.3 tegrated c ,on). Switch e variety of perature an kdown volt all devices es it very a age types o on given by 5V RF LD e 4.4. Summ 22FDX®: C o prove the Low-Noise Hz pseudo ut for prop in of 12.7 (IL) of 0.6 measured, 19]. elding and Q-factor o 3. MOM cap ircuits req hing and R f LDMOS nd the RD tage has a is summa attractive te of the RF L y the 3.3V MOS [Sch mary of key Circuit Per e suitability e Amplifie differentia er impedan dB and pe 65 dB and 0 , achieving d using up of 80 for a 2 pacitor RF p quire devic RF applicati devices [S Son is com wide marg arized in T echnology LDMOS cir RF LDMO h 18]. y RF and DC rformance y of 22FDX er LNA ar al 2-stack nce matchi eak 41 % P 0.95 dB IL g a best-in pper 1x m 28-fF MOM performance ces with h ions requir Sch 18]. T mparable w gin making Table 4.4. T for RF/mm rcuit desig OS or optim C paramete e X for mmW re designed PA is show ing. The m PAE [Che L at 28 GH n-class NF metal layer M capacito e from 2.4 to high break re also high The leakag with devic g for a sim The combi mWave an gners can c mizing for ers for LDM Wave appli d and repo wn in Figu measured pe 19]. A thre Hz and 40 G F = 1.46 dB rs only ca or at 77GH o 77GHz fo kdown vol h fT and fm e of these ces referen mple and ea ination of nd analog d chose an op higher fma MOS devices cations, 28 orted. The ure 4.4, wi erformance ee-stack SP GHz, respe B with ve an also be Hz is achiev or the 22FDX ltage (BVds max. The 22F devices is nced in [S asy design high fT, f design. Wi ption with ax and oper s available i 8 GHz Pow simplified th transfor e of this PA PST switch ctively [Ba ery low PD e employe ved [Shi 18 technolo ss) and low FDX® tech s below 1 Sch 18]. A use. The R fmax, BVdss, ith an offer either high rating volta in 22FDX® p wer Amplif d circuit sc rmer at bot A shows a P h shows on al 19]. A L DC of 9.8 m d. With d 8]. ogy [Shi 18] w on-resis hnology of pA/µm at Additionally RF perform and low R ring of diff her fT and ages using portfolio [Sc fier (PA), s chematic o th the inpu P1dB of 16 n-state inse LNA circui mW at 28 design ] stance ffers a room y, the mance RDS,on fferent lower a 5V ch 18] switch of the ut and dBm, ertion it was 8 GHz

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© 2019 5. Sc To exam sourc the a open Fig 6. Co Th portf yield thank devic Addi (275G PA, L to av Refe [Pat 1 20 9 ISTE OpenScie calability a o enrich th mple of op ce/drain co access resis ing the wa gure 5.1. (a onclusions he 22FDX® folio. The 2 d and low c ks to super ces immun itionally, s GHz) n-FE LNA and s vailable bul erences 8] Pattorn G 18. ence – Publishe Figur and Value he technolo ptimized E ontacts an e stance (Ron ay for the n a) Cfringe red The benefi s ® technolog 22nm FDS costs. Optim rior electro ne to RDF uperior RF ET (p-FET) switch circ lk technolo G. L., «Unlea ed by ISTE Scie re 4.4. Simp -Added So ogy differe EPI for im evident par n) (Figure 5 next steps o uction with it directly tra gy has bee OI technol mum trade ostatic con F. Thus, su F/mmWav ) fT and 37 cuit results ogies. ashing Tech ence Publishing plified 28GH olutions entiation ne mproved R rasitic capa 5.1 (a)). It of 22FDX® the employ anslates on n revisited logy levera e-off betwe ntrol and S uperior loc e results a 71GHz (29 prove the nology Solu g, London, UK – Hz 5G Powe ew integra RF/mmWa acitance (C translates ® technolog yee of faced improved ( d with majo ages out 75 een perform Si channel. cal missm are obtaine 99GHz) fma e superior p tions for a N openscience.fr er Amplifier ation eleme ave perform Cfringe) redu directly on gy [Ayd 18 d EPI compa (b) fT (+18% or focus on 5% of 28nm mance and Intrisicall match and ed thanks t ax were ach performanc New Era of r r circuit sche ents can be mances. E uction is m n fT and fm ]. ared to stan %) and (c) fm n the differi m bulk pro low-powe y un-dope low-freque to the plan hieved on t ce of 22FD Connected I ematic e employed Employing measured w max boost (F ndard integr max (+19%) [ ianting and ocess flow, er consump ed channel ency noise nar constru thin oxide DX® techno Intelligence» Pa d. We repo faceted r without affe Figure 5.1 ration schem [Ayd 18] d large ava , leading to ption is obt makes als e are meas uction. 347 CMOS dev ology com », ESSDERC ge | 8 ort an raised ecting (b-c)) me. ailable o high tained so the sured. 7GHz vices. mpared C, p. 2,

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[Web 14]Weber O. et al., «14nm FDSOI Technology for High Speed and Energy Efficient Applications », VLSI, 2014.

[Maz 11]Mazurier J. et al., « On the Variability in Planar FDSOI Technology: From MOSFETs to SRAM Cells», IEEE Transactions on Electron Devices, vol. 58, issue 8, pp. 2326-2336, 2014.

[Car 16]Carter R. et al., «22nm FDSOI Technology for Emerging Mobile, Internet-of-Things, and RF Applications», IEDM, pp. 27-30, 2016.

[Cri 95]Cristoloveanu S. and Li S., Electrical Characterization of Silicon-on-Insulator Materials and Devices, Springer Science & Business Media, 1995.

[Tri 16]Triyoso D. H. et al., «Extending HKMG scaling on CMOS with FDSOI: advantages and integration challenges», ICICDT, 2016.

[Cha 18] Chang M. et al., «Novel Back Gate Doping Ultra Low Retention Power 22nm FDSOI SRAM for IOT Application», ESSDERC, pp. 78-81, 2018.

[Pir 18] Pirro L. et al., «Optimization of RTN FDSOI Device Performance for Analog/Mixed Signal and Low Noise Applications», SSDM, 2018.

[Pir 18-B]Pirro L. et al., «RTN and LFN Noise Performance in Advanced FDSOI Technology», ESSDERC, pp. 254-257, 2018.

[The 15]Theodorou C. G. et al., «New LFN and RTN analysis methodology in 28 and 14nm FD-SOI MOSFETs», IRPS, pp. XT.1.1-6, 2015.

[Ong 18]Ong S. H. et al., «A 22nm FDSOI Technology Optimized for RF/mmWave Applications», RFIC, 2018.

[Wat 17]Watts J. et al., «RF-pFET in Fully Depleted SOI demonstrates 420 GHz FT», RFIC, 2017.

[Shi 18] Shi J. et al., «Evolution and Optimization of BEOL MOM Capacitors Across Advanced CMOS Nodes», ESSDERC, pp. 190-194, 2018.

[Sch 18] Schippel C. et al., «A 22nm FDSOI Technology with integrated 3.3V/5V/6.5V RFLDMOS Devices for IOT SOC applications», S3S accepted, 2018.

[Che 19]Chen T. et al., «Excellent 22FDX Hot-Carrier Reliability for PA Applications», IEEE RFIC, submitted, 2019.

[Bal 19] Balasubramaniyan A. et al., «10-40GHz Very Low Insertion Loss SPST Switch in FDSOI», IEEE RFIC, submitted, 2019.

[Zha 19]Zhang C. et al., «Low Noise Figure 28GHz LNA Design in 22nm FDSOI technology», IEEE RFIC, submitted, 2019.

[Ayd 18] Aydin O. I. et al., «Advantages of Faceted P-Raised Source/Drain in Fully Depleted Silicon on Insulator Technology », ECS Trans, vol. 86, issue 7, pp. 199-206, 2018.

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