L CS-1

L

MONO-OPERATIONS POLY-OPERATIONS DECLARATIVE OPERATIONS

CS-1

INPUT

MONO-OPERATIONS

Operation Page

ENter 3

SToRe 5

SToRe (Channel) 6

NO .. OP 7

CLear 8

Right SHift 9

Left SHift 10

ADD 11

SUBtract 12

MULtiply 13

DIVide 14

SQuare RooT 15

COMpare 16

ComPlement 18

SELective 19

RePlace 20

RePlace SElective 21

.JumP 23

Return JumP 26

B JumP 27

B SKip 28

RePeaT 29

INput (With or Without Monitoring) 31

OUTput (Witti or Without Monitoring) 32

EXternal COMmand 33

EXternal COMmand Multi Word 34

TERMinate Buffer 35

Set Interrupt Lockout 36

i of ii

MONO-OPERATIONS (Cont.)

Operation

Set Interrupt Lockout-EXternal Remove Interrupt Lockout

Remove Interrupt Lockout-EXternal Remove Interrupt Lockout and Jump NORMalize

Enable Continuous Data Mode Disable Continuous Data Mode

ii of ii

37 38 39 40 41 42 43

MONO·OPERATIONS

Operations which mnemonically express a machine instruction are mono-operations. Each mono-operation in the source language (LO) is translated by CS-1 to one machine instruction in the o~ject language (L

4), i.e., the translation is one-to-one.

Mono-operations have a definite format:

w

• [operator] • [allied operand] •

[y

^-operand]

• [j

-operand ]

~

W gives a mono-code which defines a class of machine instructions, such as enter, store, etc

Vo

gives added information which further defines a machine instruction, thus is called the allied operand. The allied operand may specify a register, r, or a simple logical or arithmetic expression, e. ^It is absent in some operations Some of the mono-codes are multipurpose. They form a class of operations. In such cases, the allied operand combines with and modifies the operator to generate a distinct instruction in the object language. An example is the selective operator, SEL. When combined with the

vo

operand, SET t it generates a computer function code

f

of 50. Similarly, SEL • CP generates an

f

of 51, SEL • CL generates an

f

of 52, and SEL • SU generates 53. An- other eXample of a multipurpose operator is ADD:

ADD • A ADD • Q ADD • LP

In each case the compiler generates a separate machine code instruction.

v -

_{1 .} specifies either 1) a numeric value, 2) the address of a memory location, or 3) a register (A, Q, or Bn

). The y-operand is a Read-class operand, a Store -class operand, or a Replace-class operand (see COMPUTER-ORIENTED OPERA- TIONS, for a discussion of these). VIis absent in some operations

Note: Subsequent references to y include all of the above interpretations unless otherwise speCified.

1 of 43

V 2 - specifies a j -operand which is primarily used for jump or skip determination or for repeat status interpretation. The action caused by these may be condi- tional or unconditional as directed by the operand used. Seven j -operands are applicable to the majority of mono-operations; these are called normal j-oper- ands. Certain operations require the usage of unique j-operands, called special j -operands. These are explained in the discussions of those operations.

The j -operand is absent on other operations Normal j-operands are as follows:

Operand,j (blank)

SKIP QPOS QNEG AZERO

ANOl APOS ANEG

Performance Will not skip the next operation

Skip the next operation unconditionally Skip the next operation if Q is positive Skip the next operation if Q is negative Skip the next operation if A is zero Skip the next operation if A is non-zero Skip the next operation if A is positive Skip the next operation if A is negative

speciai j -operands are required for use with the following operations: Jump, Return Jump, Divide, Repeat, Add Q, Subtract Q, and all non-mask Compares.

Mono-code operators, combining with allied operands in most cases, are capable of generat- ing all the irredundant instructions of the Unit Cpmputer's repertoire. Additional operations such as "do nothing" operation, NO-OP, and "complement a register", CP, produce single instructions which achieve such actions which are not apparent in the names of computer function codes.

2 of 43

INTer Operation:

W Vo VI

. . ENT •

[r

^or

eJ • [y ] •

The ENT operation either 1) first clears the register, r, and then transmits the numerical value expressed by y to register r, or 2) performs the function expressed by e and enters the result in A. The Y that appears in e refers to the numerical value which y defines.

Vo

designates the register into which the numerical value is entered; r can be:

A, Q, or GO through B7 or

Vo

states one of several simple arithmetic or logical expressions, e , to be per- formed, which are then entered into A. These are:

Expression, e Performance

{I} LP LP (y) ^(Q)*

..

^A

(2) Y+Q y + Q

..

^A

(3) Y-Q y - ^Q

..

^A

V 1 gives a Read-class operand that defines y

V 2 specifies a normal j -operand; it is optional when V 0 is A, Q, Y +Q or Y -Q

or

V2 specifies a j -operand when Vo is LP. In this case the operation permits all normal j -operands except QPOS and QNEO. Substituted for QPOS and QNEG

are two special ^j -operands as follow:

EVEN - Even parity (even number of "ones" in

A) '.

ODD - Odd parity (odd number of "ones" in A) Note: If Vo is BO through B7, V 2 must be absent.

*LP (y) (Q) means the bit-by-bit product of (y) and (Q)

3 of 43

ENT (

f: 10,11, 12\

13, 30, 31, 40)

Examples:

. . ENT • Y+Q • UX(SACK+B4)

c:>

. . ENT • Q • X77776 • AZERO

m>

. . ENT • LP • W(BAG9+3) • EVEN

4 of 43

ENT ( f. 10, 11, 12)

13, 30, 31, 40

ST 0 R e Operation:

w

. . STR

• •

The STR operation stores either 1) the content of register r , or 2) the result of an expressi~n, e, in a storage location delegated by y •

. Vo -

designates the register, r, whose content is stored in a memory location.

Vo

can be:

A , Q , 80 through B7

or

Vo -

states one of several simple arithmetic or logical expressions, e, to be per- formed, which are then stored in a memory location. These are:

v -

₁

Expression, e Performance

(1) LP LP(A)(Q)* • y

(2) A+Q A+Q

..

^{y and A}

(3) A-Q A-Q

->

^{y and A}

gives a Store-class operand that defines a memory location y

specifies a normal j -operand; it is optional

l

Note: If r is B,O through 87, V 2 must be absent.

Examples:

. . STR • B7 • L(PEN-S)

->

. . STR • A-Q • W(lNK) • QNEG

->

. *LP(A)(Q) means the bit-by-bit product of A and Q

;

5 of 43

STR

( f: 14, 15, 16,) . 32, 33,47

STo Re (channel) Operation

w

. . STR • (Channe11 • [y 1 • . [sub-fUnCtiOn COde] •

This operation provides the interrupt word at the specified location.

. V 0 - Specifies the channel of the desired interrupt word. Channels CO - C7, CIO - CI7 are permitted. V 0 may specify a name which is identified by a MEANS operation or a CHAN-SET tape

V 1 - Specifies the location at which the interrupt word is to be stored. This operand may specify only the whole contents of a memory location

V 2 - Specifies the sub-function code:

(absent) * - means the contents of the appropriate address reserved for interrupt word storage will be transferred to Y as specified by V 1'.

This instruction is necessary with new line equipment to reset the Interrupt Request

FORCE

Examples:

- provides forcing the word on the line to be stored at Y as specified by VI' Program will hold until the word is read causing an Input Acknowledge signal (this is an abnormal mode used for testing some equipment )

. . STR. C3 • W(CAT)

->

. . STR. SMPCHAN • W(DOG) • FORCE . . .

*The Input Ackrtowledge is set automatically when the interrupt word is read into the special address, which occurs in both old and new line equipment

6 of 43

STR (channel)

U:

¹⁷⁾

NO-OP Operation:

w

. . NO-OP •

The NO-OP operation is a "do nothing" operation. It generates a 12000 00000 in the object program, causing the computer to move on to the next operation.

7 of 43

NO-O?

(f: 12)

CL ear Operation:

w Va

. . CL •

[r

^{or y ] ...}

The CL operation clears the memory location specified by y or the register specified by r.

Vo -

designates the register to be cleared; r can be:

A , Q ,11 through 87 or

va -

gives a Store-class operand that defines y Examples:

• CL . . CL

• Q . .

• L(GIMME) . .

8 of 43 CL

(f: 16, 10, 11, 12, 13)

light SH iit Operation:

w

. . ISH

• • •

The ISH operation shifts the content of the register, r, to the right y bit posi- tions. As the information is shifted, the original sign bit replaces the higher order bits of register r; the lower order bits are shifted off the end.

Only the lower-order 6-bits of yare recognized. The higher-order 24 bits are ignored.

v

0 - deSignates the register that the operation shifts; r can be:

A, Q , or AQ

AQ represents the 60-bit register conSisting of A and Q V 1 - gives a Read~class operand that defines y

V2 - specifies a normal i-operand; it is optional Examples:

. . ISH • AQ • 15D • AZERO . .

" R S H . A • L(FLlP+6) . .

RSH

9 of 43 (f: 01, 02, 03)

Left SHift Operations:

w

. . LSH

• • •

The_ LSH operation shifts the content of the register, r, to the left y bit posi- tions. The shift is circular; the low-order bits of r are replaced by the upper- order bits. Only the lower-order 6 bits of yare recognized. The higher-order 24 bits are ignored.

v

^{0 -} designates the register that the operation shifts; r can be:

A, Q, or AQ

AQ represents the 60-bit register consisting of A and Q VI - gives a Read-class operand that defines y

V2 - specifies a normalj -operandi it is optional Examples:

. . LSH • A • L(CAT) • QNEG . .

. . LSH • Q • 84 . .

LSH

10 of 43 _(f: 05, 06, 07)

ADD Operation:

w

. . ADD •

[r

^or

e ] • [y ] _•

The ADD operation either 1) adds the numeric value expressed by y to the contents of r and replaces the result in r, or 2) performs the expression,

e,

and then adds its result to A.

Vo - designates the register to which the numerical value is added Register,

r

Performance

A A +y . . A

Q Q +y . . Q

or

v

^{0 -} states a logical function, e

Expression, e Performance

LP A + LP(y )(Q)*

->

^A

Vl - gives a Read-class operand that defines y

V2 - specifies a normal j-operand if

%

^{is A or LP • If Vo is Q. AZERO and}

ANOT are not permitted; <?ZERO and QNOT are substituted instead. V 2 is optional

Examples:

. . ADD • LP • W(BOOK)

->

. . ADD • Q • 12D • QZERO . .

*LP(Y)(Q) means the bit-by-bit product of y and Q

11 of 43 _(f: 20, 26, 41) ^ADD

SUI tract Operation:

w

. . SUI •

[r

^or

e ] • [Y ] •

. The SUI operation either 1) subtracts the numeric value expressed by y from the contents of r and replaces the result in r,or 2) performs the expression, e ^I and then subtracts its result from A.

Vo -

deSignates the register from which the numerical value is subtracted

or

Register, r A Q

v

^{0 -} states a logical function, e Expression, e

LP

Performance A - y . . A Q - y . . Q

Performance

A - LP(Y)( Q)* . . A

VI - gives a Read-class operand that defines Y

. V 2 - specifies a normal j-operand if V 0 is A or LP. If Vo is Q, A Z E R 0 and

AN 0 T are not permitted. Q Z E R 0 and Q NOT are substituted instead. V 2

is optional Examples:

. . . SUI • A • 12D . . . . . SUI • Q • 16 . .

*LP(y )(Q) means the bit-by-bit product of Y and Q

12 of 43

SUB (f: 21, 27, 42)

MUL tiply Operation:

w

. . MUL • [ absent] •

[y ] •

The MUL operation multiplies Q by the numerical value expressed by Y, leaving the double length product in AQ. All numbers involved are treated as integers.

Vo -

always absent

V 1 - gives a Read-class operand that defines y. A is not permitted V 2 - specifies a normal j-operand

The actual multiplication is performed with positive numbers only; therefore, if the original sign bits of y and Q are not Similar, an end correction is made by complementing the product. The branch condition j -operand is interpreted prior to the end correction, thus ANEG has no effect and APOS always gives an unconditional skip.

Examples:

. . MUL • . . MUL •

L(PAPER-2) . .

4"

13 of 43

MUL (f: 22)

DIY ide Operation:

w

. . DIY • [ absent] •

[Y] _•

The DIY operation divides' AQ by the numerical value expressed by y, leaving the quotient in the Q register and the remainder in the A register. The remainder bear s the same sign as the quotient.

Vo - always absent

VI - gives a Read-class operand that defines Y. A is not permitted V 2 - specifies a skip-the-next-operation condition

Operand,j (blank)

SKIP OF NOOF AZERO ANOT APOS ANEG

Condition Does not skip on divide Unconditional skip

Skip if there is an overflow Skip if there is no overflow Skip if A = 0

Skip if A ~ 0

Skip if A is positive Skip if A is negative

Note: There is no indicator on the console to represent a divide fault. However, by cOding each operation .with a j of OF, a program test for a divide fault is automatic. With this selection for j, a skip of the next operation occurs if the divide fault exists. The skip would be made to a JP operation which provides remedial means of noting the error or of correcting it. Therefore, the opera- tion which follows the DIV operation should have a j-operanq."of SKIP in order to preclude the JP operation whenever the divide sequence ,culminates in a correct answer. A divide fault can be detected also if the DIV operation is

I

executed with a j of NOOF. In this case, a correct answer is indicated when a skip occurs. Since A is alw~ys positive at the time j is sensed, ANEG becomes meaningless.

Examples:

. . DIV. W(PAD+82) • OF

->

. . DIV. 86 . .

14 of 43

DIV (f:23)

SQuare looT Operation:

W Vo V

1 V2

. . SQRT • [absent] • [absent] . ,

[j] ..

The SQIT operation finds

JiQI

and places it in Q. The remainder goes to A, always destroying the previous contents. The radix point of (Q) is assumed to be at the low order end of the register.

v

⁰ always absent V 1 - always absent

V 2 - specifies a skip-the -next-instruction condition

Operand, Condition

(blank) Doe s not skip

SKIP Always skip

REM Skip if A 1= 0

NO REM Skip if A = 0

Examples:

. . SQRT . .

. . SQIT. NO REM . .

15 of 43

SQii{f (f: 23)

COM pare Operation:

Type A

Type B

W Vo VI ^V₂

..

^COM

^•

^{[ r ]}

^{• [Y ] • [ iJ} ..

W Vo VI ^V₂

..

^COM

^•

^MASK

^{• [Y] •}

^{[ j ]}

^...

Type A:

The COM operation compares the value' expressed by y with r. A skip of the next operation takes place if the condition specified by j is satisfied. The content of r is not changed.

Vo - designates the register with which the numeric value 'is compared Register, r

A

Q AQ*

Performance A: y

Q: y

. A: y and Q: y V 1 - gives a Read-alass operand that defines y

V2 - specifies a skip condition; it must be present. The special meanings of j are:

Operand,j YLESS

YMORE

YIN

YOUT

Condition

{

Skip if the value expressed by y S Q Skip if the value expressed by y S A

{

Skip if the value expressed by y > Q Skip if the value expressed by y ... > A

{

Skip if Q ~ value expressed by y and the value expressed by y > A. Q ~ y > A

{

Skip if Q < value expressed by y or the value expressed by y S A. Q < Y S A

• Use only with j -operands YIN or YOUT. y is compared with A and Q as individual 30 bit registers

16 of 43

COM (f: 04, 43)

Type B:

The COM. MASK operation compares A with the bit-by-bit product of the values expressed by y and Q. A skip of the ne.xt operation takes place if the condition specified by j is satisfied. The contents of A and Q are not changed.

Vo - ,says MASK

VI - gives a Read-class operand that defines y

V 2 - specifies a normal j -operandi it must be present. The condition of A is tested after LP{y )(Q)*is subtracted from A. The LP(Y)(Q)*iS then added to A

Examples:

. . COM • AQ • W(TAI-2) • YIN . .

• COM • MASK • L(TAB) • AZERO . .

. *LP(},) (Q) means the bit-by-bit product of y and Q

17 of 43

COM (f: 04₁ 43)

Com P lement Operation:

w

. . CP

•

The CP operation complements all bits of the'register specified by 'Y.

Vo -

designates the register which is complemented; r can be:

A or Q

Example:

. . CP • Q . . (Gen: 14000 00000)

CP

18 of 43 (f: 51, 14)

IEL ective Operation:

w

. . SEL •

[e ] • •

The SEL operation performs logical manipulations specified by e on the content of A. A string of bits expressed by y controls these manipulations.

Vo -

states one of several logical functions. These are:

Expression, e

SET

CP

CL

SU

Performance

Sets the individual bits of register ^A corre- sponding to ones in the numeric value expressed by y, leaving the remaining bits of A unaltered Complements the individual bits of register A corresponding to ones in the numeric value ex- pressed by y, leaving the remaining bits' of A unaltered

Clears the individual bits of register A corre- sponding to ones in the numeric value expressed by y, leaving the remaining bits of A unaltered Replaces the bits of A with bits of the numeric value expressed~by y correspondingt'o ones in Q VI - gives a Read-class operand that definesy. A is not permitted

V2 - specifies a normal j -operand; it is optional

Examples:

" S E L • CP • X77774 . .

. . SEL • SET • W(CLlP) • AZERO . .

SEL 19 of 43 ^(f: 50, 51, 52, 53)

RePLace Operation:

w Yo

~ V2 ·

RPL • [e ] • [ y ] • [ j ]

The RPL operation performs the function expressed bye, and stores the result in A and in a memory location established by y. The Y that appears in e re- fers to the numerical value which y defines.

Vo .

states a simple arithmetic or logical expression to be performed. These are:

Expression, e Performance

(1) A+Y A + Y

..

^{Y and A}

(2) A-Y A - Y

->-

^{Y and A}

(3) Y+Q Y + Q

->

^{y and A}

(4) Y-Q Y ^{- Q}

am>

^{y and A}

(5) Y+l Y ⁺ 1

->

^{Y and A}

(6) Y-l _{(7) LP LP} Y - 1 _(y) (Q)*&;;>

..

^Y y ^{and A} and A (8) A+LP A + LP (y) (Q) . . _y and A (9) A-LP . A - LP (y) (Q)

II»

y and A VI gives a Replace-class operand which defines address y

Va

specifies a normal

i

-operand; this is valid with all V 0 operands except LP

or

V2 specifies the j -operand when Vo is LP. In this case the operation permits a~l

normal j -operands except QPOS and QNEG. Substituted for QPOS and QNEG are two special j-operands as follows:

EVEN - Even parity (even number of "ones" in A) ODD - Odd parity (odd number of "ones" in A) Examples:

. . RPL • A+LP • W(CRUNCH) • QNEG ~

. . RPL • Y-Q • UX (HOPTO+B6)

->

. . RPL • LP • W (DOP+B4) • ODD

->

*LP (y) (Q) means the bit-by-bit product of (y) and (Q) 20 of 43

RPL

( f: 24, 25, 34, 35) 36, 37, 44, 45, 46

Replace 5E lective Operation:

w

. . aSE

• [eJ •

The aSE operation performs logical manipulations specified by e on the con- tent of A, and then stores A in the memory location whose address is expressed by y. A string of bits in the same memory location controls these manipulations before the store takes place.

Vo -

states one of several logical functions. These are:

Expression, e

SET

CP

CL

SU

Performance

Sets the individual bits of register A to one corresponding to ones in the numeric value ex- pressed by y, leaving the' .remaining bits of A unaltered, then stores A at the storage address

expressed by y

Complements the individual bits of register A corresponding to ones in the numeric value ex- pressed by y, lea ving th~ remaining bits of A

unaltered, then stores A at the storage address expressed by y

Clears the individual bits of register A corre- sponding to ones in the numeric value expressed by y, leaving the remaining bits of A unaltered, then stores A at the storage address expressed by y

Replaces the bits of A with. bits of the numeric value expressed by y corresponding to ones in Q, then stores A at the storage address ex- pressed by y

VI - gives a Replace-class operand that defines y

RSE

21 of 43 . (f: 54, 55, 56, 57)

V2 specifies a normal ;-operand; it is optional

Examples:

. . RSE • SU • W(COVER+B4)

->

. . RSE • CL • LX(POW5) . .

RSE 22 of 43 (f: 54, 55, 56, 57)

JumP Operation:

w

~ ^{JP •} [absent] •

The JP operation clears the program address register P, and enters the ad- dress designated by y in P for certain conditions specified by j . Thus y be- comes the address of the next operation and the beginning of a new program sequence. If a jump condition is not .satisfied, the next sequential operation in the current sequence is executed in the normal manner.

Vo

always absent

VI· gives a Read-class operand which defines address y V2 specifies a jump condition

Operand ^j QPOS QNEG AZERO ANOT APOS ANEG (blank) KEYl KEY2 KEY3 STOP STOPS STOP6 STOP7 Cn

ACTIVEIN Cn ACTIVEOUT

Condition Jump if Q is positive Jump if Q is negative Jump if A is ,equal to zero Jump if A is not equal to zero Jump if A is positive

Jump if A is negative Unconditional jump Jump if Key 1 is set Jump if Key 2 is set Jump if Key 3 is set Jump and then stop

Jump and then stop if Key 5·is set Jump and then stop·if Key 6 is set Jump and then stop if Key 7 is set {see next page for condition description

• If j is CnACTIVEIN or CnACTIVEOUT, an operand code of X, LX, UX, and A is not permitted

JP

23 of 43 (f: 60, 61, 62, 63)

CnACTIVEIN'·

Cn ACTIVEOUT'·

Examples:

..

^JP

^•

^TRACE

..

Jump if the input buffer mode on channel n is active (n = 0, - , 17)

Jump if the output buffer on channel n is active (n

=

0, - , i7)

...

^JP

^•

^L(TRIG

⁺

⁸²⁾

^•

^KEYl

..

...

^JP

^•

^ROAR

^•

C14ACTIVEIN

..

* May be a name which is defined by a MEANS operation or a CHAN-SET tape

JP

24 of 43 (f: 60, 61, 62, 63)

JumP Operation

W Vo VI V 2 V3

. . JP • [absent] • [location] • [channel] • COMACTIVE ...

This operation provides a means for determining whether an external function command buffer is active.

v

^{0 -} Always absent

VI - Specifies the location to which control is to be transferred if the specified external function command buffer is active'

f

. This operand may contain only a tag or a tag with a K designator of L

V 2 - Specifies the. channel on which the external command buffer is to be tested.

Channels CO-C7, CIO-C17 are permitted. V 2 may specify a name which is identified by a MEANS operation or a CHAN-SET tape

V 3 - Specifies that this test is for an active external function command buffer Examples:

. . JP. PTH • C10 • COMACTIVE . .

. . JP. PTH • TAPECHAN • COMACTIVE . .

JP

25 of 43 ^{(f: 17)}

Return JumP Operation:

W

Va Tf

..

^{RJP • [absent] •}

^{[Y ]}

The IJP operation performs the following steps if conditions specified by j are satisfied: 1) it stores the content of the program address counter P, which is the address of the IJP operation plus one, into the lower 15 bits of the memory location which has the address specified by y, and 2) then it enters P with Y + 1.

Thus, Y + 1 becomes the address of the next operation and the beginning of a new program sequence.

If the j condition is not satisfied, the next sequential operation in the current sequence is executed in the normal manner.

Vo always absent

Vl gives a Read-class operand which defines address y V2 specifies a jump condition

Operand, j QPOS QNEG QZERO

ANOT APOS ANEG (blank)

KEYl KEY2 KEY3 STOP STOPS STOP6 STOP7 Examples:

Condition Return jump if Q is positive Return jump if Q is negative Return jump if A is equal to zero Return jump if A is not equal to zero Return jump if A is positive

Return jump if A is negative Unconditional return jump Return jump if Key 1 is set Return jump if Key 2 is set Return jump if Key 3 is set Return jump and then stop

Return jump and then stop if Key 5 is set Return jump and then stop if Key 6 is set Return jump and then stop if Key 7 is set

. . .1.lP • TIACE • STOP • . . IJP • U(FLAT+B7) . .

RJP

26 of 43 ^(f: 64, 65)

I JumP Operation:

w

. . IJP

•

v o

•

V 1

The IJP operation tests the content of the B register specified by r. If (r) is zero, the normal sequence of operations continues. If (r) is non zero, (r) de- creases by one, and a new sequence of operations begins at the address ex- pressed by y.

v

0 - designates a B register: 11 through 17 VI - gives a Read-class operand that defines y

Note: A j-operand is not permitted.

Examples:

. . BJP • 85 • DESK •

• BJP • 11 • U(EXIT+B2) . .

. 27 of 43

SJP (f: 72)

I SKip Operation:

w

. . ISK

• •

The ISK operation tests the content of the B register specified by r. If (r}is equal to the numeric value expressed by y, the control sequence skips the next operation and(r) is cleared. If (r)is not equal to the numeric value expressed by y, the normal sequence of operations continues, and (r) increases by one.

v

0 - designates a B register: 81 through 87

VI - gives a Read-class operand that defines y Note: A j-operand is not permitted

Examples:

. . aSK • 83 • ^{S6 ....}

. . aSK • 84 • 82 . .

28 of 43

BSK (f: 71)

RePeaT Operation:

W

Yo

_Vl

RPT • [absent] •

[Y ] •

The RPt operation initiates a repeat mode of control which causes execution of the next sequential operation the number of times expressed by y, or until the j -operand condition of the next operation is satisfied, whichever occurs first.

B 7

keeps count of the number of times execution is to take place. (B 7

decreases by one after each execution.)

Vo always absent

VI gives a Read-class operand that defines y. If y is zero, the next instruction is skipped

V2 specifies the mode of address modification of the repeated operation Operand, j

(blank) ADV

lACK

ADDB

R

ADVR

Control

Unmodified repeat of next operation

Advance the operand address of the repeated operation by one after each individual execution Decrease the operand address of the repeated operation by one after each execution of the

I repeated operation

Adds cumulatively the B register indicated in the repeated operation to its operand during each execution

....

Increase the operand address of the repeated Replace -class operation by the content of B6 for the s tore portion of the replace only Increase the operand address of the repeated Replace-class operation by the content of B 6

for the store portion of the replace only; then in- crement the operand address of the repeated operation by one after each execution

29 of 43

RPT (f: 70)

Operand BACKR

ADDBR

Control

Increase the operand address of the repeated Replace-class operation by the content of B 6 for the store portion of the replace only; then decrement the operand address of the repeated operation by one after each execution

Adds cumulatively the B register indicated in the repeated Replace-class operation to its operand address during each execution; in ad- dition to the above, increase the operand ad- dress of the repeated operation by the content of B 6 only for s tore portion of the replace Note: Usej -operands R, ADVR, BACKR, and ADDBR only when a RPL

operation follows the RPT operation.

Examples:

. . RPT • 39D . .

. . RPT • B7 • BACK . . . . . RPT • L(TRADE3) • ADDBR

Note: All interrupts are locked out once the repeat mode has been initiated.

30 of 43

RPT (f: 70)

INput Operation (With or Without Monitoring):

w Vo

_{~ V 2}

..

^{IN • [channel]}

• [y ] •

^{[absent or} MONITOR ]

->

The IN operation establishes the control to transfer data from external equip- ment to the core memory via a specified channel. The address limits are de- fined by a numeric value expressed by y , which are transferred to memory ad- dress 00100+n, where n is the number of the channel. Subsequent to this opera- tion, but not as part of it, the individual buffer operations are executed at a rate determined by the external device. The starting address, initially established by this operation, is advanced by one following each individual buffer operation.

The next current address is maintained throughout the buffer process in the lower order 15-bit positions of memory location with storage address 00100+n.

This mode continues until it is superseded by a subsequent initiation of an input buffer via the same channel, or until the higher order half and the lower' order half of storage address 00100+n contain equal quantities, whichever occurs first.

The first and last address of the memory area is specified in location 00100+n

Vo

deSignates the Channel, Cn, through which buffering takes place:

CO, - , C17 VI gives an operand that defines y. If V

l is a number of five digits or less, or has an operand code of L, y replaces the lower half of address 00100+n. If VI is a number of more, than five d~gits, or has an operand code of W, y replaces the whole word of address 00100+n. Operand codes of X, U, LX, UX, or A, are not permitted

V2 specifies whether the buffer operation is to be monitored or not. Monitoring is specified by V

2 being MONITOR. Otherwise V

2 is absent'"

A buffer operation is monitored if the main program is interrupted and control is transferred to 00040+n when the buffer operation is ttTrminated by the control addresses in address 00100+n becoming equal.

Examples:

. . IN • C5 • 52367 . .

. . IN • C14 • W(LIMIT) • MONITOR . .

IN

31 of 43 ^{(f: 73, 75)}

OUTput Operation (With or Without Monitoring):

w _~

V

2

OUT. [Channel]

• [y ] •

^[absent or MONITOR]"

The OUT operation establishes the control to transfer data to external equipment from the core memory via a specified channel. The address limits are defined by a numeric value expressed by y; these are transferred to memory address OOl20+n, where n is the number of the channel. Subsequent to this operation, but not as part of it, the individual buffer operations are executed at a rate de- termined by the external device. The starting address, initially established by this operation, is advanced by one following each individual buffer operation.

The next current address is maintained throughout the buffer process in the lower order l5-bit positions of memory location at storage address OOI20+n.

This mode continues until it is superseded by a subsequent initiation of an input buffer via the same channel, or until the higher order half and the lower order half of storage address OOl20+n contain equal quantities, whichever occurs first.

The first and last address of the memory area are specified in location OOl20+n . V 0 deSignates the Channel, Cn

, through which buffering takes place:

CO, - , C17

Vl gives an operand that defines y. If VI is a number of five digits or less, or has an operand code of L, y replaces the lower half of address 00120+n. If V

l is a number of more than five digits, or has an operand code of W, y replaces the

l

whole word of address OOl20+n. Operand codes of X, U, LX, UX, or A are not permitted

V 2 specifies whether the buffer operation is to be monitored or not. Monitoring is specified by V 2 being MONITOR. Otherwise V 2 is absent

A buffer operation is monitored if the main program is interrupted and control is transferred to 00060+n when the buffer operation is terminated by the control addresses in address OOl20+n becoming equal

Examples:

. . out.

C7 • 41456 . .

• OUT. C12 • L(LOC) • MONITOR . .

OUT

32 of 43 (f: 74, 76)

External-COMmand Operation:

W Vo V 1 V 2

... EX-COM • [Channel]. [external function Code] • [sub-function COde]

=>

The EX-COM operation initiates a one word external function buffer

v

^{0 -} Specifies the channel on which the external function code is transferred. Chan- nels CO -C7, C10 -C17 are permitted. V 0 may specify a name which is identified by a MEANS operation or a CHAN-SET tape

V 1 - Function code, this may be a ten digit number or less, or the whole contents of a memory location (i.e., operand code of w). Other operand codes are not permitted. B-Box modification is not allowed if V 1 is a constant

V 2 - Specifies the sub-function code

(absent) - The external function command is sent without force or monitor

fORCE - Used when the communication is with external equipment which has not been designed to send an "external function request" to the computer. MONITOR may be used in conjunction with an EX-COM

with a V 2 operand of FORCE

MONITOR - Provides a transfer of control to location 00500+j when the buffer of the external function word is completed

l

MONFORCE - Provides the combined capabilities of MONITOR and FORCE

Examples:

. . EX-COM • CO • 4300000016 • FORCE . . . . EX-COM. C17 • W(EFUN) . .

. . EX-COM. ny • CHAN • W(EFT) • MONITOR . . . . EX-COM. SPILL • W(EFF) • MONFORCE . .

33 of 43

eX-COfA (f: 13)

EXternal-COMmand-Multi Word Operation

W Vo V1 V2

. . EX-COM-MW • [Channel] • fy] • [s~b-funCtiOn COde] . .

The EX-COM-MW operation sets up the appropriate external function buffer control word (at 00140+j) and initiates output buffering of the specified external function commands

v

^{0 -} Specifies the channel on which the external function codes are sent. Channels CO - C7, C10 - C17 are permitted. V 0 may specify a name which is identified by a MEANS operation or a CHAN-SET tape

V 1 - Gives the buffer limits of the function codes to be transmitted. This may be the contents of a whole memory location only (Le., operand code of w). Other operand codes are not permitted. B register modification is not allowed if V 1 is a constant

V 2 - Specifies whether the buffering of the external function command words is to be monitored. When monitored, the completion of the buffer will cause transfer of control to external function buffer monitor interrupt entrance address 00500+J Examples:

. . EX-COM-MW. C3 • W(FCCW) • MONITOR . . . . EX-COM-MW. ·TAPECHAN • W(SFCC) . .

34 of 43

EX-COM-MW (f: 74, 76)

TERMinate Buffer Operation

w Vo

_{V 1}

. . TERM

•

[Channel number or ALL

J •

[buffer mOde] . .

The TERM function terminates input, output, external function command, or all buffers as specified by the V 0 and V 1 operands.

v

0 - Specifies the channel on which buffering is to be terminated. Channels CO - C7, ClO -Cl7 are permitted.

Vo

may specifyaname which is identified by a MEANS operation or a CHAN-SET tape

ALL - Causes all buffering including that of external function commands, input data, and output data to be halted. No V 1 operand is allowed when the V 0 operand is ALL

V 1 - Specifies the mode of buffering to be terminated

(absent) - The V 1 operand must be omitted if the V 0 operand was ALL

COM - Terminates the buffering of external function commands on specified channel

INPUT - Terminates the buffering of input data on specified channel OUTPUT -Terminates the buffering of output data on speCified channel Examples:

. . TERM. C6 • COM . . . . TERM. ALL . .

. . TERM. C17 • OUTPUT . . Example: (illegal)

. . TERM. ALL. INPUT . .

35 of 43

TER~l

(f: 66, 67)

Set Interrupt Lockout Operation

w Vo

. . SIL. ALL . .

The oper"tor SIL locks out both internal and external interrupts on al1 channels.

v

^{0 - The only}

Vo

operand allowed is ALL

Examples:

. . SIL. ALL . .

Example: (illegal)

• SIL. C6 . .

36 of 43

SIL (f: 66)

set Interrupt Lockout - EXternal Operation

W Vo

. . SIL-EX • [channel]"

The operator SIL-EX

*

sets external interrupt lockout for the specified channel.

v

^{0 -} Specifies the channel on which external interrupts are to be locked out. Channels CO - C7, ClO - Cl7 are permitted. V 0 may specify a name which is identified by a MEANS operator or a CHAN-SET tape

ALL - Locks out external interrupts on all channels Examples:

• SIL-EX. CIO . . . . SIL-EX. ALL . .

. . SIL-EX. FLEXCHAN . .

*

The interrupts locked out by SIL-EX, can be released only by the RIL-EX operation

37 of 43

SIL-EX (f: 66)

Remove Interrupt Lockout Operation

w " Vo

. . IlL •

[abse~t

^or ALL] . .

The operator RIL removes interrupt lockouts on all internal channels, and all external channels not previously locked out by saL-EX operations.

v

0 - The effect on the computer is the same whether V 0 is ALL or absent

(absent) - If V 0 is absent an instruction of the type 600XX XXXXX will be generated

ALL If V 0 is ALL an instruction of the type 66X10 XXXXX will be generated

Examples:

... IlL . . . . IlL. ALL . .

RIL

38 of 43 ^{(f: 60, 66)}

Remove Interrupt Lockout - EXternal Operation

w

. . RIL-EX •

Vo

[channel] . .

The op~rator RIL-EX

*

releases the interrupt lockout for external interrupts.

v

^{0 -} Specifies the channel on which the external interrupt lockout is to be released.

Channels CO -~7, C10 - C17 are permitted. V 0 may specify a name which is identified by a MEANS operator or a CHAN-SET tape

ALL - Removes the external interrupt lockout on all channels Examples:

. . RIL-EX. C10 ...

. . RIL-EX. ALL . . . . RIL-EX. TTYCHAN •

*

This ipstruction must be used to remove interrupt lockouts on channels previously locked out by SIL-EX operations. RIL operations only release lockouts for external interrupts not locked out by SIL-EX , and of course internal interrupts

39 of 43

RIL-EX (f: 66)

Remove Interrupt Lockout and JumP Operation

w Vo

. . RILJP

•

^{[ y ]}

The RILJP operation removes the interrupt lockout, thus allowing a subsequ~nt interru~t, and jumps to address y unconditionally. The operation generates a 601nnnnnnn instruction.

Vo gives a Read-class operand which defines address y

40 of 43

RILJP (f: 60)

NORMalize Operation:

w

. . NORM • [ r ]

The NORM operation shifts AQ left circularly until the upper two bits of A are unequal or until AQ has been shifted 728 times.

v

0 - designates AQ

41 of 43

NOR;~~

f: (7707)

Enable Continuous Data M ode Operation:

W Vo

VI

. . ECDM • [ Channel] • [sub-function cOde]

The ECDM operation will automatically reinitiate a buffer when termination occurs. Upon'termination, a new pair of control words are transferred to the buffer control address for this channel and the buffer 're -activated. If a monitor interrupt has been selected, it will occur at this time.

Vo - Specifies the CDM channel. Channels C0-C7, C10-C17 are permitted if they have the necessary hardware modification. V 0 may specify a name which is identified by a MEANS operation or a CHAN-SET tape

V I - Establishes direction of data transfer INPUT

OUTPUT

Data transferred into the computer. Buffer Control Word is located at address (00200 + Cn)

Data transferred to external equipment. Buffer Control Word is located at address (00220 + Cn)

,42 of 43 ECDM

Disable Continuous Data Mode Operation:

w

... DCDM • [Channel] • [SUb-fU?ction COde]

The DCDM operation disables the CDM for a given channel

Vo

Specifies the CDM channel. Channels C0-C7, C10-C17 are permitted.

Vo

may specify a name which is identified by a MEANS operation or a CHAN-SET tape INPUT Disables input CDM control

OUTPUT Disables output CDM control

43 of 43 DCDM

POLY-OPERATIONS

Operation Page

ENTRY 2

EXIT 3

CLEAR 5

PUT 6

MOVE 8

INCREMENT 10

Upper-TAG 12

PRINT 13

TYPEC 15

YYPET 18

PUNCHC 20

PUNCHT 23

TYPE-DECimal 25

PUNCH-DECimal 27

i of i

POLY·OPERATIONS

Quite frequently, a sequence of instructions appears iteratively in a program. This sequence performs a specific job or function. It is possible in cases such as this to generate the se- quence of instructions with a single CS-l operation. This is the familiar one-to-nlany rela- tionship between instructions which shall be herein termed poly-coding, with the parent instruction being called a poly-operation. A poly-operation is capable of generating within the compiler system a unique sequence of computer instructions (in some cases a single instruction) designed to perform the specific task required.

It is permissible during the coding of a routine to intermix mono- and poly-operations in any order desired. However, the programer must not attempt to skip a poly-operation with the j-operand of a mono-operation. The poly-operation usually results in the generation of more than one instruction in the assembled object program; the computer skips the first of these instead of the intended next mnemonic operation in the source program. The compiler-gen- erated computer instructions appear in the object program in the order specified by the CS-l coding~

Poly-operations are capable of producing compiler-generated, unique labels and tags for internal use during compiling. The Appendix gives a complete discussion of compiler-gen- e rated tags.

The computer frequently employs registers A, Q, and B 7

in object program instructions re- sulting from poly-operations. In so dOing, it destroys any previous information contained in these registers. The programer should therefore exercise caution in trte use of these regis- ters in statements preceding poly-operations. In cases where their use is necessary and the content of any of these registers is required later, the programer must save their content by transfer to a temporary storage location for later reference.

1 of 28

ENTRY Operation:

L

w

. [ subroutine name ] . . ENTRY • [stop COnditiOn] •

The ENTRY operation establishes a standard means of starting all subroutines.

It produces either a normal entry with no jump conditions or a jump capability with Key Stop options. This operation is the first one in each subroutine; because of this it must have a label which gives the subroutine name. Although each ENTRY operation generates only one instruction, the variations which the in- struction can assume make it a poly-operation.

v

0 - names the key which must be set on the computer console if the programmer wishes the computer to stop on exiting from the subroutine. If operand

Vo

is absent (no key stop specified), the compiler generates a word of O's for the first subroutine word in the object program. If

Vo

is present, the compiler generates a 61 j 00 00000, where j is determined by the

Vo

operand. The allowable entries for

Vo

are:

5TOP5 ^j

=

⁵

5TOP6 j

=

⁶

5TOP7 j

=

⁷

Example a:

L W

Vo

TYPEC

..

^{ENTRY ~} 5TOP6",

Generated: Mnemonic Equivalent

161 600 00000

I

^{JP • 0 • 5TOP6}

Example b:

L W

TYPET

..

^ENTRY

Generated: Mnemonic Equivalent

100000 00000 ) None

2 of 28

ENTRY

EXIT Operation:

Vo -

L w

[ optional label

J..

^EXIT

_•

[ jump condition ] . . -

The EXIT operation provides a means of exiting normally from a subroutine, i.e., it generates a jump back to the ENTRY operation of the . subroutine and thence to the main routine. The EXIT operation is used at every place in the subroutine where an exit from it is desired; hence, any number of exits is per- mitted. The label is optional.

Although the compiler generates only one instruction per EXIT operation, the generated instruction can assume a variety of formats. The format depends on 1) whether the

Vo

operand of the foregoing ENTRY of the subroutine is present or absent, and 2} the EXIT V 0 operand itself. Because of these variations this operation is classed as a poly-operation. If the

Vo

operand of the preceding ENTRY operation is absent, the compiler generates a 61j.!.0 nnnnn or a 60j

!O

nnnnn. If the V 0 operand of the preceding ENTRY operation is present, the compiler generates either 61 j QO nnnnn or 60 j QO nnnnn. The address assigned to the preceding ENTRY position is nnnnn. The compiler looks for this address, then inserts it in the tag position, nnnnn, of the EXIT operation.

determines j in the instruction generated by the EXIT operations as follows:

If the EXIT

Vo

^is: The generated instruction is:

j k b y

Absent 61 0 (lor 0)· 0 nnnnn

QPOS 60 2

QNEG 60 3 ^....

AZERO 60 4

ANOT 60 5

APOS 60 6

ANEG 60 7

. *If V 0 of previous ENTRY is absent, k

=

l . If V 0 of previous ENTRY is present, k

=

⁰

3 of 28 ^EXIT