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Marris-Morini, Paul Crozat, et al.
To cite this version:
Daniel Benedikovic, Leopold Virot, Guy Aubin, Jean Michel Hartmann, Farah Amar, et al.. 40 Gbps
heterostructure germanium avalanche photo receiver on a silicon chip. Optica, Optical Society of
America - OSA Publishing, 2020, 7 (7), pp.775-783. �10.1364/OPTICA.393537�. �hal-02925845�
40 Gbps heterostructure germanium avalanche
photo receiver on a silicon chip
Daniel Benedikovic,
1,* Léopold Virot,
2Guy Aubin,
1Jean-Michel Hartmann,
2Farah Amar,
1Xavier Le Roux,
1Carlos Alonso-Ramos,
1Eric Cassan,
1Delphine Marris-Morini,
1Paul Crozat,
1Frédéric Boeuf,
3Jean-Marc Fédéli,
2Christophe Kopp,
2Bertrand Szelag,
2AND
Laurent Vivien
11Université Paris-Saclay, CNRS, Centre de Nanosciences et de Nanotechnologies, 91120 Palaiseau, France 2University Grenoble Alpes and CEA, LETI, 38054 Grenoble, France
3STMicroelectronics, Silicon Technology Development, 38926 Crolles, France *Corresponding author: daniel.benedikovic@universite-paris-saclay.fr
Received 23 March 2020; revised 8 May 2020; accepted 4 June 2020 (Doc. ID 393537); published 9 July 2020
Photodetectors are cornerstone components in integrated optical circuits and are essential for applications underlying modern science and engineering. Structures harnessing conventional crystalline materials are typically at the heart of such devices. In particular, group-IV semiconductors such as silicon and germanium open up more possibilities for high-performing on-chip photodetection thanks to their favorable electrical and optical properties at near-infrared wavelengths and processing compatibility with modern chip manufacturing. However, scaling the performance of silicon-germanium photodetectors to technologically relevant levels and benefiting from improved speed, reduced driv-ing bias, enhanced sensitivity, and lowered power consumption arguably remains key for densely integrated photonic links in mainstream shortwave infrared optical communications. Here we report on a reliable 40 Gbps direct detec-tion of chip-integrated silicon-germanium avalanche p-i-n photo receiver driven with low-bias supplies at 1.55 µm wavelength. The avalanche photodetection scheme calls upon fabrication steps commonly used in complementary metal-oxide-semiconductor foundries, alleviating the need for complex epitaxial wafer structures and/or multiple ion implantation schemes. The photo receiver exhibits an internal multiplication gain of 120, a high gain-bandwidth prod-uct up to 210 GHz, and a low effective ionization coefficient of ∼0.25. Robust and stable photodetection at 40 Gbps of on–off keying modulation is achieved at low optical input powers, without any need for receiver electronic stages. Simultaneously, compact avalanche p-i-n photodetectors with submicrometric heterostructures promote error-free operation at transmission bit rates of 32 Gbps and 40 Gbps, with power sensitivities of −12.8 dBm and −11.2 dBm, respectively (for 10−9 error rate and without error correction coding during use). Such a performance in an on-chip
avalanche photodetector is a significant step toward large-scale integrated optoelectronic systems. These achievements are promising for use in data center networks, optical interconnects, or quantum information technologies. © 2020 Optical Society of America under the terms of theOSA Open Access Publishing Agreement
https://doi.org/10.1364/OPTICA.393537
1. INTRODUCTION
Efficient and reliable photodetectors have been at the forefront of optoelectronics research and development since the rise of inte-grated optics. Photodetectors are enabling devices on the road toward applications in modern science and engineering. To date, photodetectors have primarily harnessed standard crystalline materials that, hinging upon their electronic bandgap, convert an optical signal into an electrical one [1–3]. Most optical receivers rely on photodiodes made of III-V and group-IV semiconductors, which are widely used in modern electronic and optoelectronic industries [4,5]. The optoelectronic characteristics of group-IV semiconductors, in particular, can be harnessed to fabricate advanced and scalable monolithic platforms [6–10]. A rather small
set of fundamental building blocks is indeed needed to fully control nanoelectronics and nanophotonic functions on a single chip using the powerful fabrication technology present in Si complementary metal-oxide-semiconductor (CMOS) foundries. Promising as these breakthroughs are for future circuitry, improved speed and power efficiency with a cost reduction are still key challenges. On a receiver side, group-IV-based photodetectors offer attractive levers to meet ongoing demands.
Germanium (Ge) photodetectors integrated on silicon (Si) platforms have steadily progressed in terms of performance, cost effectiveness, and versatile production process in a Si-foundry environment. Conventional p-i-n diodes have good responsivities, high bandwidths, and low dark-current levels [11–19]. However,
energy efficiency of the optical link [20]. Low-capacitance pho-todetectors are also preferred, as they are associated with improved power link budget [21]. For the most part, simple p-i-n diodes yield low electrical output levels and additional electronic stages with transimpedance amplifiers (TIAs) and limiting amplifiers (LAs) therefore needing to be bonded on the chip. Considerable energy savings could be obtained by eliminating such elements [22]. The development of high-performing and receiverless pho-todetectors has for long constituted a tangible yet nontrivial task in integrated nanophotonics. At present, such photodetectors would streamline the photo-receiver design, minimize its size, and be less costly to produce on large scales. An alternative to conventional p-i-n-devices lies in diodes that exploit impact ionization phenom-ena [1–3], i.e., avalanche photodetectors (APDs) with an internal multiplication gain. APDs have room for improvement compared to their conventional counterparts.
Metal-semiconductor-metal (MSM), p-i-n, and separate absorption charge multiplication (SACM) structures are com-monly used for the fabrication of APDs [23–36]. Avalanche MSM detectors are compatible with semiconductor nanofabrication processes and operate under low biases [25]. However, such devices suffer from high dark currents, limited gain, and reduced sensitiv-ity, hampering performance improvements. By contrast, SACM photodetectors benefit from a low multiplication noise thanks to the use of Si in the multiplication region. Reliable avalanche per-formance at a transmission bit rate of 10 Gbps has been reported in surface-illuminated [26] and waveguide-coupled [27] structures. A definitely higher bias is needed (>20 V) to drive such devices, however. Such performances are typically on par with established III-V-based APDs [37–42], without the limitations of a higher substrate cost, complex heterogeneous integration, and possible contamination of a CMOS line. In addition, III-V APDs can also provide improved gain-bandwidth product and excess noise factor similar to those achieved in Si–Ge devices [25,26]; however, for the most part at the cost of impractical operating responsivities [37–39]. Thus far, limited APD performances are hampering many surging applications in both long-haul and short-reach information and communication technologies operating at main-streamC -band and O-band wavelengths. APDs operate under high voltages and/or they support only low-to-moderate bit rates., but typically not both. The use of overly high voltage supplies in short-reach systems such as cloud services [43], data centers [44–46], or high-performance computing [47,48] is not prac-tically suitable [49]. Such emerging applications typically have targeted speeds beyond 10 Gbps per optical carrier wavelength [50,51]. Besides that, APDs should ideally have a compact foot-print, Si-foundry compatibility, high gain-bandwidth products, and low noise characteristics, which are difficult to simultane-ously obtain [23–42]. More recent works have concentrated on APD structures driven at low voltages (<10 V), with transmission bit rates of 10 Gbps [27–30] and 25 Gbps [31,33], respectively. Recently, low-bias operation was also achieved in Si–Ge APDs with two- and three-terminal design layouts. The bit rate was 25 Gbps only for both full-receiver [35] and receiverless [36] circuit arrangements, however.
APD solutions, with a competitive performance level exceeding the reach of existing devices.
2. DESIGN AND FABRICATION
A schematic view and an optical microscopy image of the waveguide-coupled APD based on lateral p-i-n and butt-waveguide coupling are shown in Figs.1(a)and1(b), respectively. The p-i-n APDs were fabricated on 200 mm silicon-on-insulator (SOI) substrates with a 0.22 µm thick Si layer and 2 µm thick buried oxides. The SOI wafers were processed in an open-access photonic platform for monolithic large-scale integration that leverages existing fabrication infrastructure [52]. The p-i-n APDs exploit a waveguide-integrated architecture with a lateral silicon– germanium–silicon (S–Ge–Si) p-i-n heterojunction [18]. With such a simple integration scheme, optical devices other than photodetectors can be simultaneously fabricated (such as optical modulators). The implementation of photodetectors with lateral Si–Ge–Si heterojunction is particularly advantageous, as the inte-gration yields improved modal confinement and flexible control over the intrinsic region, while avoiding some of the process issues of full-Ge micrometric schemes [11,12,53].
Herein, a 0.26 µm thick photon-absorbing section is obtained through selective Ge epitaxy in deep cavities with 0.06 µm thick Si floors. Those cavities were etched at the end of SOI waveguides. The Ge layer is located betweenp-type- and n-type-doped lateral Si slabs, obtained by ion implantation with boron and phos-phorus, respectively. The top-level metal contacts are formed on doped Si regions through back-end-of-line (BEOL) processing using standard CMOS metallization steps. The fabrication is discussed inSupplement 1, Section 1. The light coming from an optical fiber is coupled through a focusing surface grating coupler into a short Si waveguide [see the optical microscopy image in Fig.1(b)]. Both grating couplers and interconnecting waveguides are designed so that only the fundamental quasi-transverse-electric (quasi-TE) field is well-supported at C -band wavelengths cen-tered at 1.55 µm. The p-i-n APD is locally excited via low-loss butt-coupling light injection by connecting the input Si waveguide directly to the intrinsic Ge region. The Si waveguide cross section is 0.22 µm × 0.50 µm(Si thickness × Si width).
The nominal p-i-n APD under study has a Ge active area 0.26 µm deep, 0.50 µm wide, and 40 µm long. The submicro-metric photodetector cross section results in the generation of high electric fields in the intrinsic Ge zone [18]. The high strength of the electric field speeds up generated carriers to their saturation velocities, enabling fast operation under low biases [54]. For an avalanche operation, an aggressive shrinkage of the intrinsic region through judicious narrowing [29] and/or thinning [30,31] of the intrinsic zone increases the dead space effect [55–57]. This, in turn, helps suppress the avalanche excess noise and eases the avalanche multiplication process taking place at lower voltages [29–31].
Fig. 1. Waveguide-coupled p-i-n photodetector with a lateral silicon-germanium-silicon heterojunction integrated at the end of a silicon-on-insulator waveguide. (a) Three-dimensional schematics. Insets: cross-sectional views of the p-i-n device and the injection waveguide. Standard 200 mm SOI wafers with 0.22 µm thick silicon layer and 2 µm thick buried oxides were used as substrates. Thicknesses of the intrinsic germanium region and the underlying sil-icon floors are ∼0.26 µm and ∼0.060 µm, respectively. (b) Optical microscopy image of a few fabricated devices. The nominal device has a 0.26 µm deep, 0.50 µm wide, and 40 µm long intrinsic Ge region.
3. RESULTS
A. Current-Voltage Characteristics, APD Responsivity, and Gain
The room temperature current-voltage characteristics of a nominal heterostructured Si–Ge–Si APD without light coupled into the device is shown in Fig.2(a). In the low-voltage regime, dark current remains consistently below 1 µA. In particular, for Fig.2(a)device, the dark current is 47 nA at 1 V reserve bias. This corresponds to a dark-current density of 0.452 A/cm2. Then the dark current increases to its peak of 600 µA, reaching the avalanche breakdown
threshold near ∼11 V. The avalanche breakdown voltage decreases as the width of the intrinsic region decreases [see inset of Fig.2(a)] as measured on devices with varying geometries. Target geometries of the device’s intrinsic region as designed/drawn on the mask layout and as fabricated may slightly differ, however. This results in changes in the avalanche breakdown voltage. Those variations may be attributed to factors such as mask layer misalignments, diffusion, and varying thicknesses of Si floors and Ge epi-layers. The linear decrease of the breakdown bias with the shrinking of the intrinsic region width suggests that the same levels of the electric
Fig. 2. Current-voltage characteristics and avalanche photodetection in the heterostructured silicon–germanium–silicon p-i-n photodetec-tors. (a) Evolution of the dark current with an applied reverse bias. Inset: avalanche breakdown voltage as a function of the intrinsic region width. (b) Photocurrent evolution with an applied reverse bias and different illumination conditions. A tunable laser source emitting at a fixed wavelength of 1.55 µm was used to generate the photocurrent. (c) Photoresponsivity as a function of the reverse bias for an optical input power of −12.4 dBm. Inset: photocurrent versus optical input power at 0 V and 0.5 V bias. (d) Avalanche multiplication gain as a function of reverse bias for different optical input powers. Inset: maximum multiplication gain versus optical input power coupled into the photodetector.
and trap-assisted tunneling effects [19]. Under high biases, the strong electric field generates, because of internal multiplication and tunneling, a large number of carriers, resulting in high dark currents. Consequently, the noise emitted by the internal multipli-cation process substantially contributes to the overall dark-current levels, and it thus becomes the principal factor limiting APD oper-ation. In case of optical receivers with conventional low-bias p-i-n diodes, the reliable operation is by contrast limited by the large noise of the electronic amplification stages, such as TIAs or LAs, rather than dark current itself. In Si–Ge–Si APDs, the Ge region is epitaxially grown in Si cavities [58], with lattice mismatch of about 4.2%. This results in the presence of large arrays of misfit and threading dislocations and therefore rather high dark currents, however. Engineered device geometry [54], advanced material integration strategies [59], or even better epitaxial growth schemes with adjusted process conditions and additional postprocessing treatment may be vital knobs to improve the crystalline quality of the active material and consequently further reduce dark-current levels [23,58].
The photocurrent generated under laser illumination was measured at a wavelength of 1.55 µm for different levels of optical input power. Photocurrent curve functions of the reverse bias are shown in Fig.2(b). The device’s photoresponsivity was quantified from current-voltage curves as follows: R =(Iph−Id)/Pin. Iph
and Id were photocurrents and dark currents, while Pinwas the
optical power coupled into the Si–Ge–Si photodetector, includ-ing gratinclud-ing coupler loss. The photocurrent versus the optical input power is shown in the inset of Fig.2(c). The experimental data were linearly fitted, and the responsivity was found to be 0.29 ± 0.02 A/W. The low value is due to the low electric field intensity at 0 V. In photodiodes with lateral Si–Ge–Si heterojunc-tions, there are energy barriers at the Si–Ge interfaces, limiting carrier collection at zero bias compared to pure Ge homojunc-tions [11–13,25,29]. Si–Ge–Si photodiodes, indeed, rely on the presence of a built-in electric field in a heterojunction to have an efficient extraction of photogenerated carriers. The responsivity in our Si–Ge–Si devices improves and reaches 0.49 ± 0.02 A/W for a 0.5 reverse bias, which is our reference value at unity gain. The vast majority of photogenerated carriers are collected, then evidencing the very good collection efficiency of such photodiodes at low voltages. We recently tested other devices with different geometries and succeeded in having a peak responsivity of at most 1.2 A/W, once again at 0.5 V reverse bias [54].
The net light gain (G) as a function of the applied reverse volt-age and input powers is shown in Fig.2(d). The gain, defined as the ratio of the photoresponsivity at a specific voltage and the reference photoresponsivity, is calculated asG = R/Rref. Figure2(d)
demon-strates that the avalanche gain increases with the increase of the reverse voltage and with the decrease of the injected optical power. First, as shown in Fig.2(c), the extracted responsivity-voltage curve (for an optical input power of −12.4 dB) shows a smooth tran-sition from the regular absorption regime with a p-i-n operation toward an avalanche regime, leveraging the internal multiplication gain. At higher reverse voltages, the operation in the avalanche
optical power. In this region, dark-current fluctuations increase photo-gain uncertainties. Indeed, the peak gain depends on the optical power that is injected into the device as shown in the inset of Fig.2(d). An exponential-like rise of the maximum gain with the input optical power is observed. A gain of ∼120 was obtained for an optical input power of about −30 dBm. The maximum gain is constantly reached prior to its ultrasharp drop.
B. Bandwidth and Excess Noise Characteristics
The bandwidth properties of the Si–Ge–Si photodetectors oper-ated in the avalanche regime were analyzed through small-signal radio-frequency (RF) measurements. They were also supported by large-signal data link measurements via eye diagram inspections obtained from an optical input signal in a non-return-to-zero (NRZ) format. Small-signal testing was performed using a conven-tional RF test setup with a lightwave component analyzer (LCA) by measuring theS21parameter in the 0.1 to 50 GHz frequency range.
Large-signal acquisitions were conducted through the modified RF test setup, without the use of bonded electronic stages with TIAs or LAs. The functional description of both experimental setups is provided inSupplement 1, Section 2.
Figure 3(a)shows normalized RF traces for different reverse biases measured at a wavelength of 1.55 µm and an optical input power of −13.4 dBm. In line with the low responsivity, the 3 dB bandwidth is limited at 0 V. The cutoff frequency is then only of 1.8 GHz. Eye diagrams at 0 V are consistently closed, as shown by the upper display, for 32 Gbps, in the inset of Fig.3(a)(the lower display shows the optical input as a reference). The built-in electrical field is indeed not strong enough to harvest the generated electron-hole pairs efficiently. In opposition, a higher reverse bias greatly enhances the electric field within the intrinsic device zone. The 3 dB bandwidth sharply increases, reaching a plateau at 3 V reverse bias. Figure3(b)shows the 3 dB bandwidth (upper panel) and the corresponding avalanche multiplication gain (bottom panel) functions of the applied reverse bias. RF tests were carried out for optical input powers of −13.4 dBm and −18.6 dBm. For an optical power of −13.4 dBm, the 3 dB bandwidths reach 17.5 GHz and 33 GHz under 1 V and 3 V biases, respectively. 32 Gbps and 40 Gbps eye diagrams (retrieved at 1 V) are shown in the upper parts of Figs.3(e)and3(f ), respectively (input sig-nal diagrams are shown in the lower parts). At 32 Gbps, the eye diagram is distinctly opened. At 40 Gbps, the Si–Ge–Si photo-detector operates in the reverse-bias-limited regime, and the eye diagram starts to close. Those trends are in good agreement with small-signal RF measurements. Furthermore, in the 3 to 7 V range, the 3 dB bandwidth stays almost constant, as the gener-ated carriers reach their saturation velocity. In this range of bias, cutoff frequencies are consistently larger than 31 GHz. Indeed, in this region, the gain increases as well due to a localized impact ionization that continually improves device photoresponsivity. These observations are strengthened by the large-signal eye dia-grams shown in Figs.3(g)and3(h). Under a 6 V bias and a gain of 2.7, eye diagrams remain open at 32 Gbps and 40 Gbps. In these working conditions, Si–Ge–Si photodetectors operate in a
Fig. 3. Frequency response, bandwidth, and noise characteristics of the heterostructured silicon–germanium–silicon p-i-n photodetector operated in an avalanche mode. (a) Normalized frequency response under different bias conditions. Power coupled into the device is −13.4 dBm at a 1.55 µm wave-length. Inset: eye diagram for a transmission bit rate of 32 Gbps and zero-bias operation. (b) Extracted 3 dB bandwidths and gains versus the applied reverse bias for −13.4 dBm and −18.6 dBm input powers. (c) Gain-bandwidth product as a function of the multiplication gain for different optical input powers. (d) Excess noise factor as a function of the avalanche multiplication gain. Eye diagrams: (e) at a 32 Gbps, under 1 V reverse bias, and a gain of 1.1; (f ) at a 40 Gbps, under 1 V reverse bias, and a gain of 1.1; (g) at a 32 Gbps, under 6 V reverse bias, and a gain of 2.7; and (h) at a 40 Gbps, under 6 V reverse bias, and a gain of 2.7.
low-gain regime without notable bandwidth constraints and with the internal multiplication gain improving the signal amplitude. In contrast, beyond 7 V reverse bias, the gain increases even further and the bandwidth starts to drop due to the avalanche buildup time. The avalanche buildup time is a major factor limiting achiev-able frequency response [60] and the working speed. For a reverse bias of 10 V (slightly below the avalanche breakdown), the mea-sured photodetector bandwidth remains larger than ∼16 GHz with avalanche gains of 7.4 and 11.4 for input power levels of −13.4 dBm and −18.6 dBm, respectively. Figure3(c)shows the extracted gain-bandwidth product as a function of the avalanche multiplication gain. Maximum gain-bandwidth products of 150 GHz and 210 GHz are achieved for those optical input pow-ers. The gain-bandwidth products of our Si–Ge–Si APDs compare favorably with state-of-the-art results achieved in both monolithic Si–Ge [29–36] and heterogeneous III–V [37–42] APDs.
High gain-bandwidth products favor high-speed device operation. They are also a hint that the device noise can be kept at a reasonably low level. APD metrics such as noise and gain-bandwidth product, particularly at high electric fields, depend on the ionization coefficients of electrons and holes within the multiplication region [60,61]. Those metrics are conventionally evaluated through the effective ratio of ionization coefficient for holes (βh) and for electrons (αe), defined askeff=βh/αe. In
bulk Ge, electrons and holes have almost the same ionization coefficients (βh≈αe).keffis thus close to unity (keff∼0.9). This
typically yields very large excess noise factors, making conventional homojunction APDs unreliable for use in optical communica-tion links. Conversely, a better APD performance is expected if keff deviates noticeably from unity. Noise characteristics of
het-erostructured Si–Ge–Si APD were examined through excess noise factor F(G) [62]. Figure3(d)shows the excess noise factor as a function of the avalanche multiplication gain. The multiplication excess noise was also evaluated using McIntyre’s formula [61], in the case of uniform electric field with electrons initiating the avalanche multiplication, as follows:
F(G) = keffG +(1 − keff) 2 − 1 G . (1)
Fitting experimental data (black dots) with McIntyre’s model (colored solid lines) yielded keff ∼0.25 in our Si–Ge–Si APD.
This lowkeffvalue is in a good agreement with the aforemetioned
gain-bandwidth achievements, compares well with previous val-ues reported earlier for Si–Ge APDs [25,26,29,30], and is better than values obtained in III-V-based devices [37–40]. A low excess noise factor in heterostructured p-i-n APDs results from localized impact ionization. Indeed, the electric field at the Si–Ge interface is larger than in pure Ge, yielding an impact ionization process that is strongly localized close to the Si–Ge interfaces rather than in the middle of the Ge layer. In the latter case, the avalanche multi-plication taking place dominantly in Ge is detrimental for APD
impact on cutoff frequency and device speed corresponds also to the working region that provides a low avalanche excess noise [60]. This way, the Si–Ge–Si photodetector benefits from simultaneous high-speed and low-noise operation.
C. APD Dynamics and Optical Power Sensitivity
Dynamic properties of heterostructured Si–Ge–Si photodetectors were further investigated under various avalanche conditions through eye diagram inspections obtained from optical NRZ input signal. Figure 4 shows 40 Gbps eye diagrams for differ-ent reverse voltages and optical input powers. The upper panel [Figs.4(a)–4(d)] shows high-speed device operation with rather low operating gains in the 1.5–5.3 range. This was achieved for a fixed average optical input power of −14.2 dBm under reverse biases of 3 V and 5 V [see Figs.4(a)and4(b)] and −17.1 dBm under voltages of 7 V and 9 V [see Figs.4(c)and4(d)], respectively. Consistently with previous observations, the high-speed operation of Si–Ge–Si photodetectors is not degraded significantly by such operating gains. Indeed, multiplication gains yielded good eye openings and rather high signal-to-noise ratios. The bottom panel shows eye diagrams at a fixed reverse voltage of 10 V (near the avalanche breakdown) and different optical input powers, rang-ing from −9.2 dBm [Fig.4(e)] down to −19.7 dBm [Fig.4(h)]. Corresponding gains are in the 5.5 up to 13 range. As expected, the multiplication gain increases and the bandwidth decreases as the avalanche buildup time dominates for reduced optical input powers. As a consequence, eye diagrams start to close [see Figs.4(e)–4(h)]. Around −20 dBm, signal acquisition starts to be limited. The heterostructured Si–Ge–Si photodetector still
gain explains why the device noise increases in this power range. APDs with heterostructured Si–Ge–Si p-i-n junctions enable a viable 40 Gbps signal detection at low optical powers and reduced bias supplies, and they also pave the way toward robust and stable on-chip photodetection.
The power sensitivity evolution of waveguide-integrated het-erostructured Si–Ge–Si photodetectors operating in the avalanche mode, without wire-bonded receiver electronic stages, was also quantified. Bit-error-rate (BER) assessments were performed for large-data detection tests thanks to an external electrical amplifier inserted between the RF bias-tee output and the BER tester (see
Supplement 1, Section 2 for details). Figure5shows the BER per-formance of APD photodetectors as a function of average optical power at bit rates of 32 Gbps and 40 Gbps. Here the reference values of power sensitivity conventionally yield a BER of 10−9,
without using forward-error correction (FEC) schemes. More specifically, under low gains of 1.8 and 2.3 and a data link rate of 32 Gbps, optical power sensitivities are equal to −10.3 dBm and −10.7 dBm, respectively. Further avalanche gain rises to 7.8 and 8.5 also improves the absolute detection sensitivity, reaching −12.4 dBm and −12.8 dBm values. Such an improvement is a positive consequence of a low excess noise factor (and consequently low effective ionization coefficient), resulting from a localized impact ionization process prevailing at the interface between Si and Ge. Moreover, at 40 Gbps, as shown in Fig.5(b), received optical powers above −9.9 dBm and −11.2 dBm enable a BER-free transmission of on–off keying (OOK) signals for avalanche multiplication gains of 3.5 and 7.5, respectively. To the best of our knowledge, these are the first competitive sensitivity reports so
Fig. 4. Evolution of eye diagrams’ apertures for 40 Gbps transmission bit rate measured at a reference wavelength of 1.55 µm and different avalanche operating conditions: (a) under 3 V reverse bias with −14.2 dBm optical power and a gain of 1.5; (b) under 5 V reverse bias with −14.2 dBm optical power and a gain of 2.1; (c) under 7 V reverse bias with −17.1 dBm optical power and a gain of 2.6; (d) under 9 V reverse bias with −17.1 dBm optical power and a gain of 5.3; (e) under 10 V reverse bias with −9.2 dBm optical power and a gain of 5.5; (f ) under 10 V reverse bias with −14.2 dBm optical power and a gain of 6.7; (g) under 10 V reverse bias with −17.1 dBm optical power and a gain of 8.4; and (h) under 10 V reverse bias with −19.7 dBm optical power and a gain of 13. Here,x [ps/div] and y [mV/div] identify the horizontal and the vertical scope axes within the measurement setting.
Fig. 5. Sensitivity assessments of waveguide-coupled silicon–germanium–silicon p-i-n photodetectors operating under avalanche conditions at a 1.55 µm wavelength. BER performance as a function of received optical power for (a) 32 Gbps and (b) 40 Gbps transmission bit rates.
Table 1. Summary on Key Performance Metrics of the State-of-the-Art Avalanche Photodetectors made in a Silicon–Germanium Platforma
Reference λ [µm] Vbr[V] Idat Vbr[µA] f3−dB[GHz] GBP [GHz] keff[–] BR [Gbps] Sd[dBm]
[24] 1.31 >20 0.400 19 152 – 25 −22.5 at 10−12BER [25] 1.31/1.5 3.5 ∼1000 39.5 300 ∼0.2 10 −13.9 at 10−9BER [26] 1.31 25 10 11.5 340 ∼0.09 10 −28.0 at 10−12BER [27] 1.55 31 200 6.24 432 – 10 −18.3 at 10−12BER [28] 1.55 29.4 100 8 310 – – – [29] 1.55 7 610 11 190 ∼0.4 10 −26.0 at 10−7BER [30] 1.55 6.2 – 10.4 100 ∼0.5 10 −24.4 at 10−9BER [31] 1.31 5 500 15.2 140 ∼0.2 25 −14.4 at 10−9BER [32] 1.31 18.8 100 56 101 – – – [33] 1.31 ∼15 – 30–40 – – 25 −12.0 at 10−4BER [35] 1.55 10 100 23 276 ∼0.05 25 −16.0 at 10−12BER [36] 1.55 ∼6 10 18.9 – – 25 −11.4 at 10−4BER This work 1.55 ∼11 600 33 210 ∼0.25 32 40 −12.8 at 10−9BER −11.2 at 10−9BER aNote I:λ, operating wavelength; V
br, breakdown reverse voltage;Id, dark current at avalanche breakdown; f3−dB, 3-dB bandwidth; GBP, gain-bandwidth product;
keff, effective ionization coefficient; BR, transmission bit rate;Sd, optical power sensitivity; BER, bit-error rate.
far on Si–Ge APDs integrated monolithically in a nanophotonic platform, with a reliable and low-noise operation at record-high bit rates of 32 Gbps and 40 Gbps, respectively, and a 1.55 µm wavelength. Moreover, relaxing the BER threshold using KP-4 FEC scheme with corrected BER level of 2.4 × 10−4, as referred
to in previous APD works [33,36], a p-i-n APD with a lateral Si–Ge–Si heterojunction can even operate with received optical power levels (at peak avalanche gains) of −16.1 dBm for 32 Gbps and −13.3 dBm for 40 Gbps signals. Table 1 summarizes key performance metrics of the state-of-the-art Si–Ge APDs. Although the devices benefit from a low excess noise, further gain increases do not yield device sensitivity improvements. Indeed, the sensi-tivity starts to saturate near the avalanche breakdown, and further performance enhancement is largely offset by higher dark cur-rents. These trends are in agreement with theoretical sensitivity estimations. Details can be found inSupplement 1, Section 3.
4. CONCLUSIONS
In this work, we fabricated compact and foundry-compatible p-i-n Si–Ge APDs, enabling robust and stable 40 Gbps direct signal detection. An avalanche gain up to 120, a gain-bandwidth product of 210 GHz, and an effective ionization coefficient of about 0.25 were obtained without the need for chip-integrated electronics. These results hold great promises for the integration of receiverless Si–Ge photodiodes in advanced power-efficient and high-speed optical links in C -band wavelengths centered at 1.55 µm. An optical power sensitivity of −11.2 dBm was achieved for 40 Gbps NRZ signals at BER of 10−9, without the use for FEC coding pattern. We also envision that further Ge epitaxy, postfabrication treatment, and/or engineered device geometry improvements may yield even better device performances. APD achievements, as shown here, open up good possibilities for chip-integrated group-IV nanophotonics to access surging optoelectronic applications
Disclosures. The authors declare no conflict of interest. SeeSupplement 1for supporting content.
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