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Deeply scaled CMOS for RF power applications

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Academic year: 2021

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Figure

Illustration of how RF CMOS devices exhibit limitations of power and frequency.  The  goal of this thesis is to identify these limits, and study how they can be pushed out.
Table 3.1: Gate length, oxide thickness and gate dimensions for the devices characterized in this work
Fig. 3.3  compares  in  detail  the peak  PAE  power performance  of the thin  oxide  devices  for the three  different  gate  lengths,  as  a function  of Vdd  at  8 GHz  (Id  = 26  mA/mm)
Fig.  3.4 shows  the  impact  of gate  oxide  thickness,  keeping  Lg  constant  at  250  nm
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