DISC CONTROLLER INSTRUCTION-MANUAL MODEL 00235
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For example, during a target receive operation, when the WAP is equal to the STP, the End of DMA Transfer Bit (Register 25, Bit 7) will be set indicating that all data received
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Upon receipt of the Read command, the head is loaded, the Busy status bit set, and when an I D field is encountered that has the correct track number, correct sector