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DP8570A Experiments to Test the Low Battery Bit or Generate a Periodic

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DP8570A Experiments to Test the Low Battery Bit or Generate a Periodic Interrupt

National Semiconductor Application Note 894 Milt Schwartz June 1993

DP8570A Experiments to Test the Low Battery Bit or Generate a Periodic

Interrupt

SUMMARY

This application note describes two experiments. One ex- periment allows the user to check that the low battery bit is working correctly. The other allows the user to generate a 10 ms periodic interrupt.

A program named RTC, written in MicrosoftTMQuick C ver- sion 1, is used for both experiments. The code works with the circuit shown inFigure 3 . This circuit is a general pur- pose interface for use with an IBMÉPC-XTÉor PC-ATÉ(or equivalent). Keyboard entries may be either upper or lower case, but the underscores must be included.

Type rtc to execute the program, then follow the instructions on the monitor.

LOW BATTERY BIT EXPERIMENT

Equipment: Variable lab supply or 20k pot, center tapped to the VBBpin.

An oscilloscope with 10 MX, 10 pF probe or higher impedance.

The initial screen output is shown in Message 1. Before selecting the LOWÐBATTÐBIT mode, set the voltage at the VBBpin to about 2.5V. If VBBis GND or too low a volt- age, a message should appear (see Message 2). Once the LOWÐBATTÐBIT mode is running, you should see screen output (see Message 3). The status of the low battery bit is displayed in the lower left of the monitor. A value of 0 indi- cates VBBis higher than the internal threshold detector. A value of 40 indicates the low battery bit is set.

Monitor the waveform at the OSC OUT pin. Observing the peak-to-peak voltage of this waveform is the only way to know that the DP8570A is in the battery backed mode, un- less the test mode is selected. The waveform is sinusoidal in form and swings within 0.6V of VBBand ground. Refer to Figures 1a, 1b, 1c .

Vary the VBBvoltage slowly as you approach 2.3V. If the VBBvoltage gets too low (less than 1.8V) the oscillator may stop. During the low battery bit mode, if VBBis grounded or a too low a voltage, you will not get any indication on screen. If you hit the spacebar and re-enter the LOWÐBATTÐBIT mode, Message 1 warning will appear on the monitor.

10 mS INTERRUPT EXPERIMENT

Equipment: An oscilloscope is needed to monitor the INTR pin.

Before starting this section of the program, connect VBBto ground. The INTRÐ10 ms code configures the DP8570A in the Single Supply mode. Message 4 is output to the monitor indicating you are in the 10 ms Interrupt mode.Figure 2a shows expected waveforms for a PC-XT (4.77 MHz);Figure 2b a 386/33 MHz AT.

Check that the Oscillator has started.

If you don’t get osc running in 5 seconds, the program will abort The Oscillator is running. The Clock is started.

You may choose the ’Low Battery Bit’ Test or

’the 10ms Interrupt’ Test or

’END to return to DOS’

Type in your choice in the following format, then hit ENTER:

Choices are: LOW BATT BIT or INTR 10ms or

END to exit the Program

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Watch out! VBB is at Ground or some illegal value VBB voltage should be between 2.2V and VCC 1 0.4V

Message 2: VBBWarning

Battery backed mode selected.

Check waveform at osc out to see if referenced to the battery voltage

Peak value should be less than the battery voltage

Adjust voltage on VBB pin while monitoring screen.

The bottom left side of the screen will display zero if VBB l threshold (about 2.1 volts),

or 40 if VBB k threshold.

This test may be ended by hitting the space bar.

Message 3: Normal Message after Selecting LOWÐBATTÐBIT

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TL/F/11847 – 1

TL/F/11847 – 4

FIGURE 1d

Conditions:

LOWÐBATTÐBIT chosen VBBe2.5V

VCCe5V

FIGURE 1a

TL/F/11847 – 2

Conditions:

LOWÐBATTÐBIT chosen VBBe3V

VCCe5V

FIGURE 1b

Conditions:

INTRÐ10 ms chosen VBBe0V

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The Oscillator is running. The Clock is started.

Now you are in the 10ms Interrupt mode

Use an oscilloscope to view the waveform at the INTR pin Hit spacebar to return to ’Selection Menu’

Message 4: Normal Message after Selecting INTRÐ10ms

TL/F/11847 – 5

Conditions:

VCCe5V VBBeGND INTR pin out running on a PC/XT (4.77 MHz)

FIGURE 2a: Expected Waveforms at INTR Pin

TL/F/11847 – 6

Conditions:

VCCe5V VBBeGND INTR pin out running on a 386/33 MHz AT

FIGURE 2b: Expected Waveforms at INTR Pin

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ComponentandPlacementList pot1e10kX CR1eseeTableI CINeseeTableI COUTeseeTableI C1e0.047mFceramicplacedatU1 C2e0.047mFceramicplacedatU2 C3e0.047mFceramicplacedatU3 C4e0.047mFceramicplacedatU4 C5e5.6mFsolidtantalumplacedatcardedge D1,D2,D3e1N914or1N4001or1N4933 R1e2.7kX R2e3.9kX R3e10kX R4e10kX R5e3.3kX R6e10turn10kX R7e20kX R8e39kX R9e5kX VBBe3.0Vto3.4VLithiumbattery(coincell) TableI CR1CINCOUT (crystal)(pF)(pF) 32.768/32.0kHz1547 4.194304MHz3668 4.9152MHz3668 TL/F/118477 FIGURE3.GeneralPurposeInterfacetoIBMPC-XTorPC-ATforExperiments

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TL/F/11847 – 8

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TL/F/11847 – 9

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TL/F/11847 – 10

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TL/F/11847 – 11

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AN-894 DP8570A Experiments to Test the Low Battery Bit or Generate a Periodic Interrupt

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness.

be reasonably expected to result in a significant injury to the user.

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