DUll
.~Drawlngs
Digital Equipment Corporation
The material herein is for information purposes only and is subject to change without notice. Digital Equipment Corporation assumes no responsibility for any errors which may appear herein.
These drawings and specifications herein are the property of Digital Equipment Corporation and shall not be reproduced or copied or used in whole or in part as the basis for the manufacture or sale of items without written permission.
Copyright
&'1975, Digital Equipment Corporation
~ ill i It \alII ~~~§..;!~~ .. DRAWING DIRECTORY -nt.s . . . . _ SP£CIFICATUIIS. II:I£IH, ME
TIt(PIOP£ITY OF DIGITAl £QUIMIT COIPOMTI. AID SHALL lit' • . . - a D • COPIED. USED II ...
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UNIT VARIATIONS
DUII-DA,EA FIELD INSTALLATION A-SP-DUil-_~4 ACCEPTANCE PROCEDURE A-SP-OUII-O -I AND ACCEPTANCE PROCEDURE
TEST PROCEDURE A-S P- DU I 1- 0 - 2
ACCESSORY LIST A-AL-DUll-91-3
VAR TITLE
PGM SYNC
INTE~ED-csoM1822-91-1 1 2 3 4
CABLE MODEM BC91SC D-UA-BC91SC-91-91
MODEM TEST CONNECTOR n-CS-H31S-lJ-l Du11-0 SINGLE LINE PGM SYNC INT. Ix
TTL TO BELL SYSTEM :301
& 30~O-CS-M595-0-1 HIGH SPEED MODEN CABLE
D-UA~8CfJIW- 0-0
CABLE INTERFACE
BD./~I D..,.CS-M910-Q-1 DUII-DA SINGLE LINE PGM SYNC INT rx
CURRENT MODE
DU11-EA SINGLE LINE PGM SYNC INT CURREN,] IX
MODE
•
\,> UlED ON OPTIONIIIODEL OlIN.. DATE
'" a: «
m u 0K. DAVIS 9-14-3 nTLE
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DUll
8
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8
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ORB 107
DEC 16-(325)-1062-3-N871
PGM SYNCH IN'l'IRFACE n-CS-M7822-,f1-1
~Ull
SINGLE LINE PGM
SYNCH0-UA-DU11-.-.
CABLE ,MODEM
BC'SC
D-UA-BC'SC-,-/8
TTL TO BEl.L SYSTEM 301
~303 D-CS-M595-rl}-1 D-UA-BC(i}IW- fj-D
o-CS - M970- 0 -I
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____________________
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1
X 'X X
X
NO
OFDRAWING NO. REV SHT DESCRIPTION
D-UA-DUII-I~1J
* '
1 SINGLE LINE PGM SYNCH. INT.A-SP-DUll-~-l
A 4
ACCEPTANCE PROCEDURE0f'I'1ON
iNO."u
DATE
i .
I
I I
. caAWINO NO.NO
OF"1\/ IHT
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OlICRIPTION
STWr..T.R LINE PGM S YNCK INT
OPTION
""./FLE OATE
A-SP-DUll-~-Z ~
12
TESTPROCEDURE
A-AL-DUll-~-3 '~lr-~~A~C~C=E=SS~O~R~Y~L~I~S~T~---+---+-+~~~~---~--~~---~--~
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D-CS-M7822-RJ-l# 6
PGM SYNC INTERFACE,-+--+--+-+-t-=--+--=K;...-..;;;C'O-M7822-~-4
I
~ I X-Y COORDINATE HOLE LOCATION- --
D-AH-M7822-(1-5 y~", tASSY/DRILLING HOLE LOCATIONB-MH-M7822-~-6~~1 \~'tI--+~M~O~D~U=L~E~E~C~O~H=I~S~T~O~R~Y~~--~--~----'-~~+-+-+-~---~~--~---4----~
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TITLE
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SINGLE LINE
PGM SYNCH
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- - + - - - + - - - 1
SIZE CODE NUMal"
REV
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3
OF3 • DO
DUll-~o
DIGITAL· EQUIPMENT CORPORATION MAYNARD. MASSACHUSETTS
ENGINEERING SPECIFICATION
DATE 18/24/73TITLE PROCEDURE
REV DESCRIPTION APpn BY DATE
A ECO CHANGE
B ECO CHANGE
C ECO CHANGE
Index
I.,
Module Configuration 1.1., Unibus Address1.2.' Interrupt Vector Address 1.3., Miscellaneous Jumpers 1.4., Mounting Information
1.5., Power Requirement and Unibus Loading 1.6., Environmental Specifications
1.7., Preliminary Testing 1.8., Testing with Diagnostics 1.9.' Systems Test
2.' Customer Acceptance
ENGIN EERING SPECIFICATION - CONnNUAnON SHEET TITLE
Example:
To select an address of 160010 switches 1 through 9 would be in the ON position, switch, would be OFF. No~e that the number of switch does not correspond to the b1t position on the Unibus, i.e., SW, doesn't sample BUS
A'.
1.2.0 Interrupt Vector Address
The DUll Vectors also fall into the floating interrupt vector space. The first vector of the floating , scheme is address 3". This would be the vector of the f1rst DUll in a system that consisted of devices which di~ not pr~Cede
the DUll in the floating vector scheme. In th1s float1ng vector scheme the "ll-W precedes the DUll. Each DUll in a system occupies two interrupt vectors.
1.2.1 Setting the Interrupt Vector
1.3.,
The vector is determined by the position of jumpers W9 through W14. During an interrupt sequence a BUS 0 line will be asserted as a logical (1) if a jumper is in place.
As cited earlier the DUll occupies two vectors. Only the first vector need be considered and it must start on a Zero boundary. The second vector is simply controlled by Wt-W14 and BUS 0 '2 which is controlled by the hardware.
Example:
To select a set of vectors, 3" and 3,4, cut jumpers .9-Wll and W14. Jumpers W13 and W12 remain in.
Miscellaneous Jumpers--Modify only at customer's request with the exception of W15 , W16 ~ WI4 -W,.
Drawing' 5
Jumper.
W2
Function
This jumper is normally OUT. If this jumper is in, the receiver logic will synchronize on one sync character in- stead of the recommended two.
6
4
W4
W14 w13 W12 wll WlO W9
DEC FORM NO DEC 16-(3111-1022-flt370 DRA 108
This jumper is normally IN. If this jumper is left out, Bits 1-3 of the RXCSR won't be cleared by Master Reset or BUSINIT. In some cases the connection with the Data Set may be required to be excluded from the effects of Master Reset or Bus Init.
Sets Vector Bit 8 when installed Sets Vector Bit 7 when installed Sets Vector Bit 6 when installed Sets Vector Bit. S.when installed Sets Vector Bit 4 when installed Sets vector Bit 3 when installed
NUMBER
DU11-,-4
SHEET _ 3 _ OF _ 9 _
ENGINEERING SPECIFICATION - co~nNUAnON SHEET TITLE
DUll-DA, EA Field Installation and Acceptance Procr ure This document is divided into two sections, the fi .t section deals with the field installation of a DUll-DA or Z\, the second section covers the customer acceptance of the opticl.
The installation section covers the configura·tion c; juaper. and switches on the module itself. It also has helpful hints that could save aggravation. All references to mod . . . are to the Bell 2'1 series for the DUll-DA, and to the Bell 3,3 for the DUll-BA.
No attempt has been made to cover other modems, although .any have the same characteristics as those cited.
Throughout this document the term DUll, without a t~ffix, refers to both the DA and SA version. Where inforaation p,~tains
specifically to one version only the appropriate suffix will be added.
Field Installation
~ 1.. Module Configuration
The DUll module M7822 is configured for the cu.toaer's system by cuttinq jUJIPers on the module and by settinq the switch pack. In IIOst Ca.e. only the Unibus address and interrupt vector addre •• need to be reconfiqured althouqh all juapers
will be defined. .
1.1., Unibus Addre.s
The DUll Qaibus address fall. into the floating address space.
The fir.t DUll floatin9 a6dre.s is 16'... This would be the .4ddr __ of i:fiefirat DUll in· a syateaif the sy.tem con- .isi:ed of no other davic.. that preceded the DUll in the floati1lCJ addre •• IICh_. In this floatinq address .cheme the DUll use. four addre..
.pace.
.tartin~ on a zero boundary and is prec ... by the DOll (i.e., 160040-&). Once the position of the DUll has bMn d.t.~"" in the floating addre.s scheme, the Unibull addre •• i . selected by t!ae rocker switohe. on the 117122.1.1.1 Settinq the Unibus Addr •••
S"itch pack (SP1) coauol. the UnilNs addr ••• of the DUll.
Onc. the Unibus ...t4re •• haa Hen "eterained, .et the rocker .witche.
a.
foll0W8. Por a 109ioa1 (1) OIl the Unibus addr ••• lin., .et tile rocker ..,itch that corr •• poads to that particular W-t ~ tMorr
position. A switch is in the OPF po.ition ... the rooker i . depre •• ed 011 the orp·;.ide of the..witch.
1-r1~1
0011-........ If'
••••••• - • • CI'ltAWOiI -
1.3.0 Dra"", •
,
,
•
J . . . . 1f5
'"
V15
.16
!\i!!ction
'nits juaper is nomally h . If this juaper i . eut pin UU of the __ q header (noraally SIIe RBC or ulluHld) will be diaconnected fro.
the BIA receiver. In other tbaJa the .peci- fied 1IOd . . . this pin My be connected to
~ift9 other tban SBC RBC in which ca.e it _y IDe . . . ary to r~ve the juaper.
'rhb jUlllper is noraally IR. I f this jwaper is ... t, pin FF of the llerq header will be 4Iiacoaaected fro. the BIA driver. Bis pin i . nGaMlly connected to the SBC XIII'r or an unutMld lead of the lIOdea. In.adella other thaa tbeae .pecified, i t lllay be nece.ary to remove this j~.
'lhi. jumper is noraally lB. V15 shollH only be rellOve4 if the proce.sor beine u.~ i . a
!tAll witbout a mll option. Por all other processor., ·this jwaper is in.
This jumper is nor.ally OUT. Only jA systems where the voltage on pin AUl is at BV RIIS
should this jumper be in.talled. A
Ga".
filter should also be installed in this case.
Refer to the installation section of the DUll maintenance manual.
Hote: If any of the aiscellaneou. juapers have been chanqed with the .xception of IUS and WI', new parAlleter. llU.t be entered into the diagnostic proqraa throuqh it's keyboard monitor.
1.4.0 MOunting Inforaation 1.4.1 DUll-DA
The DUll-DA i . coapatible with all small peripheral controller slots (SPC) to date, with the exception of tho.e internal to the KAll.
DEC FORM NO DEC 18-(311)-1022-flt370 DRA 101
NUMBER
DU11-,-4
SHEET _4_ OF _9_
ENGINEERING SPECIFICATION - CONTINUATION SHEET TITLE
1.4.2
1.5.~
1. 5.1
Consideration must be given to the routing of the BC05-C cable or cables. If more than one OUll-OA is mounted in a system unit it would be desirable to have the system unit mounted as close as possible to the port in the cab provided for the cables.
Refer to drawing O-UA-OUll-~-~ for the position of the module in a system unit.
OUll-EA
The OUll-EA is compatible only with the OOll-B unit.
This system unit must have the appropriate ECO installed for correct operation. Slots 2 or 3 are the only slots which the OUll-EA can use in the DOll-B. To install a OUll-EA into a OOll-B refer to Drawing O-UA-OUll~-_ for the position of the modules. INSURE. THAT 0011-8 E.CO :3 IS INSTALLED IN THE. 00 liB, , ,
Extreme care should be used ~n the rout~ng of the BC~l-W
modem cable. INSTALL JUMPE.RS 202 AND 301 IN M970 ALL OTHER JUMPE.RS OUT.
Power requirements and Unibus loading.
Each ~Ull places one bus load on the Unibus as defined by the peripherals and interfacing handbook, i.e., one BUS Receiver and 2 BUS Drivers per line.
1.5.2 OUll-OA power rp.quirements +5V @ 1.8 amps
+15V @ .04 amps -15V @ .07 amps
1.5.3 OUll-EA power requirements +5V @ 2. I amps
+15V @ .07 amps -15V @ .2 amps
1.6.0 Environmental Specifications
+lO°C to +50°C with a relative humidity of from 20% to 95% (without condensation).
1.7.~ Preliminary Testing 1.7.1 Voltage Checks
With the DUll plugged into the back panel check the voltages at the following points. A 453 scope should suffice if it's calibrated.
NUIIBER OUll-~-4 DEC FORM NO DEC 16-(381)-1022-N370
ORA 108 SHEET _5_ Of _9_
- _._---.----
-_._._
•._----
ENGINEERING SPECIFICATION - CONTINUATION SHEET TITLE
1.7.3 Verification of the Unibus, Bus 0 line drivers A. Press Halt
B. Press Start to issue CLR in the ~Ull
C. Examine the last DUll register, TXOBUF, (Sel. 6) The contents should read back as all ones. This proves that all ~Ull unibus D line drivers turn on.
1.7.4 Verification of Slave Sync inhibit delay
With same loop used in 1.7.2 load the PARCSR address (Sel. 2) into the console SWR.
A. Start the program. With the first scope probe verify the LD PARCSR one shot at E68l2. This output should be low for at least 65_NS (Refer Fig. A).
B. Sync on channel one of the scope, with the second probe verify that BUS SSYN is being inhibited for at least 35~NS after the rising edge of the LD PARCSR pulse. (Refer Fig. A)
(Channell)
(Channel 2)
LO PARCSR (E68l2)
SSYN EN (E5905)
Figure A
A ~l __ NS
B is greater than 350NS but less than 1.2
u.s
!)EC fORM NO DEC 16-(381)-1022'-l'lS70 ORA 101
NUIIBER
DU11-.8-4
SHEET _7_ Of _9_
ENGINEERING SPECIFICATION - CONTINUATION SHEET TITLE
*Note:
1. 7.2
IC & Pin E16 _ 1 E16 16
*E12 14
Voltage +5v)+or -250 MV -12V)+or -600 MV
Function TTL & MOS supply MOS & EIA level con- verter supply EIA level converter supply
If W16 is in place, the voltage on E12 14 will be +8V, +lV or -500 MV.
Verification of address recognition logic
With the following test loop the correct operation of the address decoding logic can be verified.
STR: MOV @ tsn, ~
ADD t" (~), execute. the DATI, OATO JMP @ tSTRI on the DUll adrs logic STR: 200 13700
177570 62710 000000 137 200
With this loop toggled in at adAres. 200.
A. Load address 200.
B. Place the first register address of the DUll into the console BWR.
C. Pres~ the start key.
D. With a scope monitor point E6',6 on the M7822, the following wavefor.a should be Observed. Mote that the tiaing given aay not be exactly accurate because of differences ift ayst.aa.
+3V ~
[&-oF-I·
C-I
A-300llS to 1.5 usec . . 500JlS to 2 usee C-300l1S to 1.5 u.ee
ITl~l
DlC PO . . 110 OK . . , • • t-... .,.
DRA 1(:'
INlET _ , _ OF _ , _
_ I I I I I I • • •
~-
TITlE
R . . . . t: thi. _ _ ~eced_. for t:M LD . . . one shot, Fig. A ana dM
uat.at
iafoaMd_ ,1 . . 11 is the _ _ wit:h the excep- tion of th8.ttaal' ...
aa4 pin de.ignation ••A. LHd . . . 210
B. Place ___ tIDIOP addre •• iato the . . . (8el.6).
C. Plaoe abaDe1/8OOpe p~obe on
B' ... .
D. Place c:MImel 2 ecope prGIbe on EStiS.
B. Pruaftart...a verU,t:h. UlIin9 a. per !'iqure A.
1.7.5 Verification of . . . ter . . . . t
r.o.d t i . . . . UC DDU-M, r.fu to the operatill9 in.tructions of
u..
I.k~t:1o . . . 1eet: a84 loop on Te.t fl. Vuify the -_tptt Of U. ..,.,-Oft. .bift (B64l3). '!'his CMitP'lt .bou14 ... Uue fO&' ,ua:.
WhU. t:his out:put is true, sIn . . (BStIS) ... 14 . . fal . . .1.8., Te.tift9 wi~ 4i-.neat:ic ••
1.8.1 DUll-DA
1.8.2
With the
le,seC
cable connected to the M782l .adul. and the opposite 8114 of the cable terllinated by t:he BllS t . . t connect- or, .tart te.ti ... with DIDU-M. All diagllOstic. fraa DZDU-M to DIDU-FA ahoull. run in the external Mde. At lea.t 3 pa •• e.of . . ch 4iawnostic sbould be . . de. This conclude. DU1I-DA teati ... , r . . . the 8315 conftector and plug the
ac...-c
intothe
1IacI_.
DUll-M
Starting with DIDU-AA through DIDU-FA, run all diagnostics with the diagno.tic runnint ift the int.rnal maintenance aode.
At least 3 . . . of each diqno.tic .hould be .... e. Connect the Berg connector of the -=,l-W into the M97, JaOdule. If the mod_ is not a Bell 3,] or 3,1, special cables might be required to connect to the lIOdea. This must be done through the local office and ia not part of the DUll-EA installation.
If the .ad . . in question i. something other than those cited, in.tallation te.ting is concluded here.
With the ci~ed .ad . . . , plug the Burndry connector of the BC,l-W into the SYNC connector of the data set. Thjs concludes DUll-EA testing.
NUMBER DUll-~-4 DEC FORM NO DEC 16-(311)-1022-N370
DRA 108 SHEET _8_ OF _9_
---~----~ ENGINEERING SPECIFICATION - CONTINUATION SHEET TITLE
1.9.0 Systems Test
1.9.1 Using the DECX11 DUll moduleOUA_
Irun all DUll's on the system.Up to 8 DUll's may be exercised on a system. At least 3 passes of each DUll should be made.
2.0 Customer Acceptance 2.1.0 DUII-DA
Customer acceptance is based on the satisfactory conclusion of Steps 1.8.1 and 1.9.1.
2.1.1 DUI1-EA
Customer acceptance is based on the satisfactory conclusion of Steps 1.8.2 and 1.9.1.
SIZE CODEl
A SP DUll-,0-4 NUMBER I REV C
DEC FORM NO DEC 16-(381)-1022-N370
ORA 108
SHEET 9 OF _9 _ _
DIGITAL EQUIPMENT CORPORATION LEGEND QUANTITY /VARIATION
MAYNARD, MASSACHUSETTS 0 DOCUMENT
~ACCESSORY LIST ON DOCUMENT CHANGE td
:I:
NOnCE u
w
WMADE BY K.DAVIS C H E eKE 0 K. GLEEZEI SECTION PA PAPER TAPE ASCII 3 z 0 ~
DATE ENGt?1
&l~"10/26/73 ..
~ -c•
•DATE PROD~. 10/26/73 W;f/'3 ISSUED SECT. PB PM PAPER TAPE BINARY PAPER TAPE ~
I I('i' M x
..J~ 0
DATE /O?,~/"~ DATE '/O/2C1 73 READ-IN-MODE .... .... .... .... :t: U ..J
8 b ~
ITEM
DWG NO./ PART NO. DESCRIPTION t::l t- en
NO.
.... ~ z ~.
~
....
H31S TEST CONNECTOR 1
BC05C - 25 MODEM CABLE 1
DFII-G CURRENT MODE OPTtON 1
DECI1-HDUMA-AD MAINTENANCE MANUAL 1 1
L IBK IT -Il-DU IIA-A-K DIAGNOSTIC PACKAGE I I
DEC-X-II- DUA- DEC-X-EXERCISER I I
TITLE SINGLE LINE PGM SYNCH. INT ASSY.NO.
SIZE CODE NUMBER REV. ECO NOA AL
DUll-~- 3 A
I~n'nnlOUII-
SHEET 1 OF 1
DIST.I I I I I I 1 I
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