HAL Id: jpa-00249546
https://hal.archives-ouvertes.fr/jpa-00249546
Submitted on 1 Jan 1996
HAL is a multi-disciplinary open access archive for the deposit and dissemination of sci- entific research documents, whether they are pub- lished or not. The documents may come from teaching and research institutions in France or abroad, or from public or private research centers.
L’archive ouverte pluridisciplinaire HAL, est destinée au dépôt et à la diffusion de documents scientifiques de niveau recherche, publiés ou non, émanant des établissements d’enseignement et de recherche français ou étrangers, des laboratoires publics ou privés.
SiO2/Si Interfacial Degradation and the Role of Oxygen Interstitials
R. Devine
To cite this version:
R. Devine. SiO2/Si Interfacial Degradation and the Role of Oxygen Interstitials. Journal de Physique III, EDP Sciences, 1996, 6 (12), pp.1569-1594. �10.1051/jp3:1996203�. �jpa-00249546�
Si02 /Si Interfacial Degradation and the Role of Oxygen
Interstitials
R-A-B, Devine (*)
France Td16com CNET, BP 98, 38243 Meylan, France
(Received 12 February 1996, received in final form 26 April 1996, accepted 22 May 1996)
PACS.61.43.Fs Glasses
PACS.68.35.-p Solid surfaces and solid-solid interfaces PACS.78.30.Am Elemental semiconductors and insulators
Abstract. High temperature annealing of SilSi02/Si structures in inert atmospheres is known to result in degradation of the oxide layer and electron and hole trap creation. We review
our understanding of the basic mechanisms active in such structures that can result in point defect generation. Using electron spin resonance and infra-red absorption data, we demonstrate that in low oxygen content Si substrates (float zone) annealing of SilSi02/Si structures at high
temperatures results in a gettering of oxygen from the oxide into interstitial sites in the Si substrate. Oxygen vacancy centres are left in the oxide. This behaviour is well accounted for by
a diffusion model in which oxygen diffuses out of the oxide, into the Si, the driving force for this motion is the temperature dependent solubility limit of oxygen in Si. This mechanism should be active in float zone substrates for essentially all temperatures > 700 °C. For high oxygen
content substrates (Czochralski grown) we also observe oxygen vacancy creation in the oxide
when very high temperature annealing is performed (rw 1320 °C). However, for these substrates at lower temperatures which are
more "technological" (rw 1000 °C) we anticipate that dissolved O interstitial diffusion to the SilSi02 interface and precipitation of Si02 platelets in the bulk will be the prime mechanisms to be considered.
R4sumd. Ii est connu que le recuit haute temp6rature des structures SilSi02/Si dans un
atmosphbre inerte conduit h la d6gradation de la couche d'oxyde et h la cr6ation de pibges h
@lectrons et h trous. Nous passons
en revue les m6canismes fondamentaux qui peuvent engendrer
des d6fauts. I partir des rdsultats d'expdriences de r6sonance paramagn6tique 61ectronique et
d'absorption infrarouge nous moutrons que pour des substrats h faible concentration en oxygbne (float zone) it y a des atomes d'oxygbne qui quittent l'oxyde et qui diffusent dans le substrat Si sous forme d'interstitiel lors du recuit des structures SilSi02/Si. Ii reste alors des lacunes
d'oxygbne dans l'oxyde. Ce processus est bien ddcrit par un modAle de diffusion dans lequel l'oxygbne quitte l'oxyde et diffuse dans le silicium. La force motrice de cette diffusion r6sulte de la limite de solubilit6 de l'oxygbne dans Si qui varie avec la temp6rature. Ce m6canisme est par-
ticulibrement actif pour les substrats "float zone" h partir de
rw 700 °C. Pour les substrats h forte concentration en oxygAne (type Czochralski) nous observons la cr6ation de lacunes d'oxygbne dans l'oxyde quand la temp6rature du recuit est trAs dlevde (rw 1320 °C). Dans les substrats h
plus foible tempdrature (rw 1000 °C) les interstitiels d'oxygbne d6jh pr6sents dans le Si diffusent
vers l'interface SilSi02
ou se pr6cipitent sous forme de plaquettes de Si02 dans le volume du substrat. Une d6gradation de l'interface est aussi envisag6e pour ces substrats.
(* e-mail: devineflcns.cnet.fr
@ Les (ditions de Physique1996
1570 JOURNAL DE PHYSIQUE III N°12
1. Introduction
It is probably reasonable to say that Si based microelectronics owes its existence to the fact that Si can be oxidised at technological temperatures and that both the oxide obtained and the interface of this oxide with the underlying Si substrate are of extremely high electrical
quality. Two facts are more or less taken for granted with respect to these thermally grown
oxides. Firstly, the oxide resulting from oxidation of Si contains very few "fixed" oxide charges, typically less than 10~° cm~~ «"hen expressed as a layer at the Si/Si02 interface. (Why charged
defects in the oxide should exist at all following such an electrically "neutral" operation as
oxidation remains, apparently, a completely open question). Secondly, despite a significant
"lattice" mismatch between Si02 and Si there are less than 10~° interface states eV~~ cm~2 in a completed Metal-Oxide-Semiconductor (MOS) field effect transistor device. A substantial
number of such interface states (for the greater part Si dangling bonds) are passivated by the
use of anneals in the region of 400 °C in hydrogen containing atmospheres. The passivation process does not, of course, definitively remove the interfacial defects and they can re-appear following exposure to ionizing radiation or energetic (a few eV) electron injection across the
SilSi02 interface. Finally, on the subject of oxide and interface related defects, it should be mentioned that there is a third type of defect, the so-called iii "border trap" which derives its name from the fact that it is suggested to exist in a border region between what one can call the bulk of the oxide and the SilSi02 interface. The exact physical nature of this type of electrically active defect is unknown but its characteristic is that its charge state fluctuates on a timescale which is much longer (say milliseconds, seconds or minutes) than that of an interface
state (microseconds). The presence of border traps in an MOS device may be detected by the
presence of low frequency noise or hysteresis effects.
On the basis of what has been said so far one would not be criticized for assuming that
we indeed understand the physical nature of the SilSi02 interface and how this interface may evolve, say, as a result of thermal treatments even if we do not know the exact physical description of the defects with which we may be involved. This is far from reality. Indeed,
were it the case, we would already have available modelling routines which would enable us to
fully anticipate the consequences of any thermal processing step which might be undergone by
a device containing an SilSi02 interface. However, since we have already concluded that we know how to make electrically "sound" oxides and interfaces which satisfy present technological demands, why should we worry about a lack of in-depth physical understanding? The answer to this question is that since technological processing is extremely expensive, one cannot tolerate
unexpected "errors" which may arise. Therefore, as we evolve and change processing steps and thermal budgets, add new materials, increase the complexity of the devices we build, etc., it is
extremely important that we will be able to predict the effects of these changes on processes carried out earlier in the device manufacturing procedure. In the present work we will address the problem of trying to anticipate the consequences of thermal treatments on degradation of the SilSi02 interface.
2. Background
There are various observations in the field of microelectronics which lead us to believe that we should be concerned with a clear understanding of the "temperature" sensitivity of the SilSi02
interface. We have already evoked the problem of explaining the origin of trapped charges
in the oxide following oxidation but we will not discuss this phenomenon here. It has also been known for a considerable time [2j that high temperature annealing of a thermally grown MOS transistor gate oxide in an inert atmosphere, following oxidation, can lead to enhanced
radiation sensitivity in the form of hole trap creation. Furthermore, the sensitivity enhancement is observed to increase with the anneal temperature. Similarly, in MOS capacitor samples
subjected to anneals in H containing or N2 atmospheres [3j with the samples either "open" to the atmosphere or with a deposited polycrystalline Si film covering the oxide, it was found that both the density of interface states and the positive fixed oxide charge density increased with anneal temperature. A hysteresis in the experimental capacitance voltage (G V) curves
was also observed following annealing, this may have been one of the first observations of the
generation of border traps in the gate oxide via high temperature annealing though it was
not realized at the time. Later [4-6j it was observed that high temperature annealing in an inert atmosphere results in the generation of both electron and hole traps in the oxide as well
as an increase in the interface state density. It ~vas also discovered that another consequence of the inert atmosphere annealing was the generation of a low field, self-healing breakdown
phenomena. These spurious breakdown events, observed as tunneling current spikes, appear rather arbitrarily during the increase of the applied voltage when measuring a current versus
voltage curve of an MOS capacitor. They do not appear to result in permanent damage of the oxide which might be observed as an increase in the general level of current for a given, applied voltage. More recent measurement on MOS capacitors [7j formed with polycrystalline Si gates
on thermally grown Si02 and annealed at various temperatures in a nominally non-oxidizing atmosphere have confirmed the annealing induced generation of electron and hole traps in the oxide. Finally, I/f noise measurements were carried out [8j on MOS transistors whose gate dielectrics had been subjected to various annealing treatments in N2 following growth. It was observed that in devices whose radiation sensitivity to hole trapping had increased as a result of the annealing step, so had the 1/f noise. These experiments provide the first clear evidence
that high temperature, inert atmosphere annealing of gate oxides generates not only hole traps but also border traps.
The above mentioned observations clearly demonstrate that annealing of MOS gate struc- tures in inert atmospheres results in the generation of interface states and border traps near
the interface and hole and electron traps in the "bulk" of the oxide. If we are to be able to model these consequences of annealing, it is clearly necessary to find an appropriate physical
model for the degradation process.
3. Models
In his early paper on defect generation resulting from annealing, Hickmott [3j advanced the idea that a reduction of Si02 at the Si02/Si interface could result from the reaction:
Si + Si02 - 2 SiO I (1)
where the product SiO is a volatile gas which is assumed to migrate away from the interface
leaving behind oxygen deficiency. A similar approach was used by other authors [9-12j who
performed annealing experiments in vacuum or in a slightly oxidising atmosphere (po~ r~
10~~ torr). It was observed, consistent with other studies [6j, that for temperatures rw 900 °C, (here in vacuum) annealing resulted in hole ti~ap generation and enhanced low field, self-healing
dielectric breakdown. Extensive annealing in vacuum resulted in the production of macroscopic holes which transpierced the entire oxide thickness (typically films > 5 nm thick). Again the
argument was advanced that the destruction of the oxide and transport of matter away from the interface resulted from an interaction such as described by equation ii).
From the very beginning, doubts were expressed about the model involving the diffusion of SiO through the Si02 network [13j. It was argued that the physical size of the SiO molecule
1572 JOURNAL DE PHYSIQUE III N°12
and the equilibrium pressure resulting from its energy of formation were such that its creation
by disintegration of the SilSi02 interface was extremely unlikely. However, it was underlined that this argument neglected the possibility that SiO could diffuse through the oxide network.
A series of subsequent papers [14-17j appear to give evidence for the fact that SiO can diffuse
through the oxide network and that the activation energy for this process is of the order of 4.2 4A eV, a value which is, interestingly, close to the value of 4.7 eV estimated [18j for O
to diffuse through the oxide via network diffusion. Such high activation energies in Si02 are characteristic of diffusion involving motion of network related atoms as opposed to interstitial diffusion ill < 1.2 eV typically). The estimated diffusivity of SiO (Ds;o) in Si02 at 1050 °C is [18j rw 5.5 x10~~~ cm~ s~~ If we calculate the diffusion length (L
= @S) for a
5 min anneal at this temperature, we find L
r~ 1.3 nm. Typical experiments demonstrating oxide disintegration and the formation of macroscopic holes were performed on 20 nm thick oxides [12j annealed for 5 minutes, it is clear that SiO could not have diffused through the films in the anneal time quoted so that the holes could not be due to simple SiO formation and diffusion. A later publication [19j suggests that germination of the macroscopic holes starts from C present in the substrate surface which reacts with the oxide to form CO, this can readily escape through the Si02 network. A process such as that described by equation ii is
invoked for oxide degradation once the process has been initiated by the reduction of the oxide by C. Clearly, the situation with respect to degradation of the SilSi02 interface following a
reaction as described by equation ii) with subsequent out-diffusion of SiO is not clear at the present time. It would appear that, given the diffusivity as a function of temperature [15,17j,
the diffusion lengths are too small to explain the macroscopic hole formation phenomena. It remains for experiments to be performed which demonstrate that microscopic degradation resulting in, say, point defect generation is feasible. Before leaving this section we note that
experiments have been performed [20j in which a beam of Si has been directed onto the surface of a heated Si02 film grown on Si. In this case the interaction of equation (I) is active and SiO is desorbed from the surface with an activation energy r~ 0.84 eV. Diffusion of the desorbing species through the oxide is not relevant in this case since the incident Si simply etches the
oxide from the outside surface.
A second model was introduced to explain the presence of electron and hole traps in MOS gate oxides following high temperature annealing in inert atmospheres [4-6j. Here, the prime
source of traps was identified to be the neutral oxygen vacancy, 03 + Si Si + 03, which is
known [21j to be amphoteric. The oxide reduction mechanism leading to the formation of the neutral vacancy was described as:
03%Si-O-Si+03-03+Si-Sie03+Oi (2)
The O released spontaneously is assumed to diffuse to the SilSi02 interface where it can be absorbed by oxidation of Si. Nesbit [22j performed inert (N2) atmosphere annealing experi-
ments on Si rich films of Si02 deposited by chemical vapour deposition methods. He observed
that amorphous or crystalline Si particles precipitated in the Si rich film which suggests that
a reaction of the type:
Si~ommsi-Sieoysi~-03+Si-O-Sie03+Si (3)
is active (note that Eq. (3) is not shown as chemically balanced). The implication of this
experimental result is that for the temperatures used (700 1060 °C) sub-stoichiometry (as
indicated by the term on the left hand side of equation (3)) is unstable and the network naturally segregates into crystalline or amorphous Si and stoichiometric Si02. Given this
observation, it is extremely difficult to imagine that the oxide reduction reaction shown by
equation (2) would be thermodynamically favourable. A similar argument can, of course, be advanced for equation (I) which, when applied to the stoichiometric Si02/crystalline Si
interface suggests that a defective, sub- stoichiometric phase must form.
4. Oxygen in /out-Dilfusion
In the following, we will describe the results of a study designed to begin to approach the
problem of interfacial degradation during high temperature processing. Thus far, the models
we have described have been based upon the assumption that defect creation proceeds via the
generation of oxygen vacancies in the "bulk" of the Si02 film. Si is a material in which O can be dissolved in interstitial sites to a concentration given by [23j:
[Ojsi "1.53 x 10~~ exp (-11948/T) (4)
The O interstitial density at 1000 °C is
r~ 1.3 x 10~~ cm~3 and at 1320 °C, r~ 8.5 x 10~~ cm~3.
It is clear that if a Si wafer having a lower O concentration is heated to these temperatures, it will endeavour to in-diffuse O from its immediate environment in order to satisfy its solubility requirement. Conversely, if Si already contains an O density higher than the solubility limit at the anneal temperature then it will lower this concentration either by out-diffusing the O (if possible) and/or by precipitation of Si02 "Particles" in the Si bulk [24j. In order to examine the feasibility of the first mechanism, oxygen in-diffusion, it is necessary to start with
so called "Float Zone" (FZ) type Si wafers whose nominal O concentration is
r~
10~~ cm~3 To
endeavour to quantify and to test this mechanism, we have constructed samples which simulate MOS gates but on a much larger scale in order to make diffusion effects more visible. Two types of sample were manufactured. The overall structure of the first type is shown in Figure la.
A dry thermal oxide
r~ 430 nm thick was grown on standard (100) oriented, 4" FZ silicon.
Following oxidation a 200 nm thick polycrystalline Si film was deposited on the oxide surface
by Chemical Vapour Deposition (CVD) using SiH4 gas at 620 °C. Subsequently, a 500 nm
thick film of Si02 was deposited on the polycrystalline Si surface by plasma enhanced CVD
using SiH4 and N20 gases, the wafer temperature was 300 °C. Samples were then annealed for either 2 hours or 6 hours in a furnace at 1320 °C in which the atmosphere was flowing
Ar + 1%02. The small quantity of 02 was required to ensure that any interaction between the anneal atmosphere and the Si wafer or polycrystalline layer was slightly oxidizing. A set of samples was also annealed at 1275 °C in pure Ar for 30 minutes. Following the annealing steps, the outer protecting oxide layer was removed in HF acid and the polycrystalline layer
then removed by exposure to XeF2 gas. For infra-red absorption studies on the substrate, the
previously "buried" oxide was removed by an HF acid dip. Witness samples were obtained by following exactly the same manufacturing and stripping steps, only the annealing phase was
not undertaken.
A second set of samples (shown by Fig. lb) was manufactured in the following manner, FZ
wafers were used as in the previous case. A film of Si02, 300 nm thick was deposited using SiH4 and ~~02 gases in a plasma enhanced CVD reactor working in the mtorr pressure regime. The substrate temperature during deposition was approximately 50 °C. The isotopically enriched
~~O gas was 95% pure (the remainder being standard ~~O). Following deposition, the oxide
was covered in a 200 nm thick polycrystalline Si film as before and a 420 nm thick layer of
Si02 deposited by low pressure CVD using ~~02 and tetraethylorthosilicate (TEDS) vapour
at 870 °C. Because of the nature of the low pressure CVD process, the oxide was deposited both on the polycrystalline film and the back face of the Si wafer. Subsequently, samples were
annealed for 6 hours at 1320 °C in Ar +1%~~02. For the infra-red absorption studies we
