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Design and optimization of silicon nanostructures

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Academic year: 2021

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Table 1: Techniques, parameters and performance of inverted nanopyramid structure on a  silicon wafer
Table 2: Techniques, parameters and performance of nanopillar structures on a silicon wafer
Table 3: Techniques, parameters and performance of nanocone structures on silicon wafer
Figure  1:  Schematic  representations  of  nanostructures:  (a)  pillars,  (b)  cones,  (c)  truncated cones, and (d) parabolas
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