• Aucun résultat trouvé

Conformal doping of FINFET's : a fabrication and metrology challenge

N/A
N/A
Protected

Academic year: 2021

Partager "Conformal doping of FINFET's : a fabrication and metrology challenge"

Copied!
1
0
0

Texte intégral

(1)

Conformal doping of FINFET’s : a fabrication and metrology challenge. W.Vandervorsta, P.Eyben, J.Mody, M.Jurczak, N. D. Nguyen, S. Takeuchi, F. Leys,

R. Loo, M. Caymax, J.L.Everaert Imec, Kapeldreef 75, B-3001 Leuven, Belgium

J.I. del Agua Borniquel, T. Poon, and M.A. Foad

Applied Materials, 974 E. Arques Avenue - Sunnyvale – CA 94087, USA

a

also : Instituut for Kern- en Stralingsfysica, KULeuven, B-3001 Leuven, Belgium Whereas the introduction of 3D-dimensional devices such as FINFET’s may be a solution for next generation technologies, they do represent significant challenges with respect to the doping strategies and the junction characterization.

Aiming at a conformal doping of the source/drain regions in a FINFET in order to induce a conformal under diffusion and homogenous device operation, one can quickly recognize that classical beam implants fail to fulfill these needs, in particular when considering closely spaced fin’s. Indeed the effects of different implant angles (top vs bottom) and the concurrent variation in projected range, dose retention and sputtering as well as the effect of the wafer rotation when tilting is used, all lead to a non-conformal doping. Alternative processes such as vapor phase deposition (VPD) or plasma doping are presently being considered, as they hold the promise of

conformality. Using VPD or Atomic Layer Doping dopant atoms are deposited on the surface through thermal decomposition of typical chemical vapor deposition

precursors and are subsequently in diffused. Good conformality (~ 93 % for sidewall vs. top dose), defect free junctions and high activation levels are the positive points of this process.

Plasma immersion doping is an alternative approach which is easier to integrate (similar to ion implantation) and suitable for p- and n-type doping. Whereas it holds the promise of conformality when implanting large macroscopic features, the latter is far less obvious when trying to dope microscopic feature conformally. In fact the formation of conformal junctions in FINFET’s with plasma based processes is quite challenging and relies on secondary processes such as resputtering, deposition and in diffusion etc. Their optimization is compromised by concurrent artifacts, sputter erosion being the most important one.

In support of these developments the measurement and identification of conformality adequate metrology is required. For this purpose we have extensively used Scanning Spreading Resistance Microscopy (SSRM) as a means to characterize the

vertical/lateral junction depths, the concentration levels and the degree of conformality. Characterization of the (3D)-underdiffusion can be achieved by a dedicated SSRM experiment and/or the Tomographic Atomprobe.

As a complement to the SSRM technique we also developed a concept based on resistance measurements of fin’s which allows to map the sidewall doping across the wafers and provides fast feedback on conformality.

Références

Documents relatifs

We develop here a summary of the work we performed, based on the use of plasma assisted deposition and plasma etching of functional polymers to produce patterns by a

One of the non- conformity measures provides prediction intervals with almost the same width as the size of the QSAR models’ prediction errors, showing that the prediction

Let M be a compact connected manifold of dimension n endowed with a conformal class C of Riemannian metrics of volume one.. Colbois : Universit´e de Neuchˆatel, Laboratoire

We show that a conformal anomaly in Weyl/Dirac semimetals generates a bulk electric current perpendicular to a temperature gradient and the direction of a background magnetic

We consider a family of space discretisations for the approximation of nonlinear parabolic equa- tions, such as the regularised mean curvature flow level set equation,

Par ailleurs, nous avons posé deux autres questions qui nous ont été inspirées au moment du prétest de notre questionnaire, où les étudiants qui y participaient

As a strategy to obtain the goals of proposed mitigation techniques, this work starts by evaluating three circuit-level methods as a manner to attenuate the

In this work, a comparative soft error evaluation of logic gates in bulk FinFET technology has been presented for a range of technologies from 65- to 32-nm.. Because of lack of