This is an author-deposited version published in:
http://oatao.univ-toulouse.fr/
Eprints ID: 8320
To link to this article: DOI: 10.1109/TNS.2012.2223486
URL:
http://dx.doi.org/10.1109/TNS.2012.2223486
To cite this version:
Place, Sébastien and Carrere, Jean-Pierre and
Allegret, Stephane and Magnan, Pierre and Goiffon, Vincent and Roy,
François Rad Tolerant CMOS Image Sensor Based on Hole Collection 4T
Pixel Pinned Photodiode. (2012) IEEE Transactions on Nuclear Science,
vol. 59 (n° 6). pp. 2888-2893. ISSN 0018-9499
O
pen
A
rchive
T
oulouse
A
rchive
O
uverte (
OATAO
)
OATAO is an open access repository that collects the work of Toulouse researchers and
makes it freely available over the web where possible.
Any correspondence concerning this service should be sent to the repository
administrator:
staff-oatao@inp-toulouse.fr
Rad Tolerant CMOS Image Sensor Based on Hole
Collection 4T Pixel Pinned Photodiode
Sébastien Place, Student Member, IEEE, Jean-Pierre Carrere, Stephane Allegret, Pierre Magnan, Member, IEEE,
Vincent Goiffon, Member, IEEE, and Francois Roy
Abstract— pixel pitch CMOS Image sensors based on hole collection pinned photodiode (HPD) have been irradiated with source. The HPD sensors exhibit much lower dark current degradation than equivalent commercial sensors using an Electron collection Pinned Photodiode (EPD). This hardness im-provement is mainly attributed to carrier accumulation near the interfaces induced by the generated positive charges in dielectrics. The pre-eminence of this image sensor based on hole collection pinned photodiode architectures in ionizing environments is demonstrated.
Index Terms—Active pixel sensors, APS, CIS, CMOS 4T image
sensor, CMOS image sensors, dark current, hole collection pinned photodiode, hole-based detector, pinned photodiode.
I. INTRODUCTION
T
HE use of commercial image sensors is considered in many harsh environments, especially for the medical, sci-entific or spatial imaging applications [1]. This implies new requirements for imagers designed for such applications, in-cluding that the CMOS image sensors (CIS) should become ion-izing radiation tolerant. Four transistors (4T) pinned photodiode pixel [2]–[5] has been established as the standard architecture for high volume imaging applications. Up to now, some studies focused on hardening-by-design pinned photodiode pixels have been disclosed [6], [7]. The improvement brought by these tech-niques has been demonstrated experimentally. Moreover, the drawbacks coming from these proposed design rules for ion-izing radiation hardening could be photodiode area reduction or charge to voltage conversion gain degradation.Considering hole devices advantages over electron ones demonstrated for common application [8], [9], it is proposed in this paper to go further by investigating how hole collection based on 4T pixel pinned photodiode architecture could be a promising candidate for ionizing radiation tolerant image sensor.
As dark current has been highlighted as the limitation factor, dark current evolution of electron pinned photodiode (EPD) and hole pinned photodiode (HPD) pixels with total ionizing dose
Fig. 1. Schematic representation of 4T CMOS pixel based on electrons detec-tion (EPD).
(TID) is proposed all along this paper. A comparative analysis of the degradation on both sensors is then used to demonstrate the benefit of HPD sensors in ionizing environment.
II. DESCRIPTION OF4T EPDANDHPD PIXELARCHITECTURES
Nowadays, most of the CMOS image sensors are based on 4T pinned photodiode organization [3], [10]–[12]. The specificity of this pixel architecture resides in the photodiode itself. It is called a pinned photodiode, which consists, in a shallow buried N-type photodiode pinched by two opposite doping layers rep-resented in Fig. 1. To allow charge transfer in a readout node called the sense node (SN), a charge transfer gate (TG) tran-sistor is used to manage the signal charge pass through. This EPD device uses electrons as signal charges and embeds NMOS transistors. This means that an in-pixel charge to voltage conver-sion is used and associated to an in-pixel source follower (SF) MOSFET. The readout is selectively done all along the matrix with a line access transistor, the readout transistor (RD). The reset cycle of the sense node is done by another transistor called reset transistor (RST).
Hole charge collection pinned photodiode coupled to ded-icated PMOS transistors is also worth considering to achieve image sensor. Such pixel has been called PMOS pixel or HPD, and has been introduced in [8], [9] for its promising perfor-mances in dark current, cross-talk and temporal noise.
In HPD architecture, as described in Fig. 2, all doping types have to be inverted in the pixel. For example, pinned photo-diode doping species have to be switched from P to N-type for pinning surface layer all along the Si/SiO interfaces, and from N to P-type for photodiode charge storage zone. The transfer gate works as PMOS transistor with P type doped sensing node.
Fig. 2. Schematic representation of 4T CMOS pixel based on holes detection (HPD).
In the same way, in —pixel MOS transistors type has been switched from N-type to P-type by playing with implantation species. The HPD pixel architecture can be declined as a process option without any pixel design modifications.
Contrary to standard EPD sensors, transistor gate in HPD ma-trices have to be biased with high voltages to switch off and low voltages to switch on. However, timing diagram remains unchanged.
III. IONIZINGIRRADIATIONCONDITIONS
The tested sensors and evaluation devices (described in each corresponding section) have been exposed to gamma ray source at the Université Catholique de Louvain (UCL). The dose rate used was . For practical reasons, each de-vice was exposed grounded and at room temperature to five dif-ferent TID: 3, 10, 30, 100, and . The influence of pixel operating condition has not been taken into account in this study.
IV. ESTIMATION OFHPD PIXELINTEREST FORIONIZING
RADIATIONHARDENING
A preliminary study is proposed through elementary test structures to point out the different advantages under irradiation of hole collection pinned photodiodes. TID degradations in CMOS integrated circuits are known to be located in the sensor dielectrics [13]. Considering our pixel, two major dielectrics have been identified: the pre metal dielectric (PMD) located di-rectly on the top of the photodiode and the deep trench isolation (DTI) used to isolate physically the neighboring pixels [14]. Several studies ([15], [16]) make use of dedicated structures to characterize these material properties under irradiation. To do so, thick dielectrics such as PMD can be used as gate oxide on specific transistors, called PMDFETs and described for NMOS and PMOS processes in Fig. 3.
Such evaluation structures were designed with large aspect ratio to compensate the low values because of the important thickness of Pre Metal Dielectrics (PMD). Each transistor was irradiated according to the same conditions of doses specified in part III. During the
Fig. 3. Cross-sections of PMDfets realized with (a) NMOS and (b) PMOS pixels processes.
Fig. 4. PMOS-type PMDfets characteristics with TID.
Fig. 5. NMOS-type PMDfets characteristics with TID.
irradiation, the devices were grounded since the PMD stack above the pinned photodiode is not biased in an operated 4T CIS pixel (Pinned photodiode (PPD) electric field lines do not penetrate the PMD thanks to the pinning layer). Results are presented for PMOS and NMOS-type PMDFETs in linear regime in Figs. 4 and 5.
Figs. 4 and 5 show that variations on threshold voltages can be clearly seen on both devices. The subthreshold slopes are also degraded but the variations are more difficult to notice directly on these plots.
Oxide traps and interface traps densities ( and ) can be extracted from these variations thanks to
TABLE I
SUMMARY OFTRAPDENSITIESDEGRADATIONWITHTID
well-known methodologies [17]. and are given for NMOS/PMOS transistors by:
(1) (2) with the sub threshold slope change and the threshold voltage change respectively for NMOS/PMOS tran-sistors, the Fermi potential for type material, the oxide capacitance, q the Coulomb charge, k the Boltzmann constant and T the device temperature.
On one hand, and increases have a cumulative ef-fects on degradation on PMOS transistors whereas they compensate each other in NMOS PMDFETs. However, both de-vice degradations are dominated by the generation of positive charges in PMD dielectric. The evaluation of traps densities is presented in Table I for the last two TID.
These results illustrate that pre metal dielectrics store the same quantities of charges during the irradiation for both tran-sistors. A difference is observed on interface states densities suggesting a larger degradation in PMOS PMD devices. It should be emphasized that the behavior of the other dielectrics surrounding the pinned photodiode (i.e., the DTI) are supposed to be similar after irradiation (same trends and same conclu-sions, but possibly different defect density values).
V. IONIZINGRADIATIONINDUCEDDARKCURRENTINCREASE:
COMPARISONBETWEENHPDANDEPD SENSORS
A. Tested Image Sensor Details
Both types of three megapixel sensors have been manu-factured with the same masks (i.e., identical sensor design) but with dedicated 90 nm CMOS imaging technology node processes: one for EPD and the other for HPD. The N-type pixel image sensor is based on standard STMicroelectronics CIS processes while the P-type pixel image sensor have been processed thanks to modified pixel doping implantation by switching doping species and reengineering net doping profile. Technological choices, summarized in Table II, include specific process dedicated to image quality improvement for a pixel pitch, such as DTI [14] or optical stack reduction. DTI are needed to minimize electrical crosstalk which becomes more and more important as the pixel pitch is scaling down.
TABLE II
SUMMARY OFPIXELPHYSICALDESCRIPTION
Fig. 6. Normalized dark current degradation between (a) EPD and (b) HPD sensors. (The same normalization factor has been used for all the plots).
B. Ionizing Radiation Induced Dark Current Degradation
The evolution of dark current distribution with TID is pre-sented respectively on Fig. 6(a) for the N-type pinned photo-diode and Fig. 6(b) for the P-type.
Measurements were performed in a dark test chamber at a regulated temperature of . All dark current values have been normalized with the same factor, so both behaviors appear on the same scale. Moreover, the electron collection and hole collection pinned photodiode sensor have a dark current unbal-anced of less than 10% before irradiation. A statistical analysis of dark current is performed on 400 kpixels subsamples.
As expected from previous results on a similar EPD CIS [18], the EPD dark current distribution shifts toward large dark cur-rent values after each TID step [Fig. 6(a)].
Fig. 7. Image on hole-based CMOS image sensors after .
As regards the HPD sensor [Fig. 6(b)], unlike the EPD be-havior, the HPD dark current distribution does not change
sig-nificantly from 0 to . Beyond ,
the average dark current value increases slightly with TID. The most striking result is much lower degradation of the P type pinned photodiode at highest doses with a dark current ratio of
40 for and 20 to between HPD
and EPD.
The same conclusion has been observed for the dark signal non uniformity (DSNU) parameter. Even though HPD DSNU is slightly larger than the EPD before irradiation, the DSNU degra-dation rate due to ionizing radiation is also in favor of HPD and as from the HPD dark current standard devia-tion is lower than EPD one. Finally, the complete funcdevia-tionality of HPD after irradiation is shown on image in Fig. 7.
VI. DISCUSSION
Under ionizing environments, two main phenomena were occurring in the dielectrics surrounding the silicon photodiode [19]: positive fixed charges are generated in the dielectric surrounding active devices, and Silicon/Silicon Oxide interface states are increased.
To discuss the direct impact of positive fixed charges, an Ar-rhenius dark current analysis was first extracted for the both sen-sors at ionizing doses beyond . Activation ener-gies of 1.27 eV for EPD and 1.17 eV for HPD have been mea-sured. These measures were extracted on four points from 25 to . Thermal accuracy is guaranteed with more or less . This means that the main degradation scheme is still dominated on both sensors by diffusion currents mechanism [20]. As a con-sequence, interfaces around the diode are not electri-cally depleted, as explained in [18], because the activation en-ergy in this case would be characteristic of the thermal genera-tion, with activation energies around 0.65 eV.
On top of this preliminary evidence on thermal response, more in depth sources of degradations than positive fixed charges are investigated and, as mentioned before, investiga-tion about interface state degradainvestiga-tion should be performed.
Fig. 8. Evolution of TG dark current amplitude modulation with TID on EPD.
A. Silicon/Silicon Oxide Interface State Characterization
To compare HPD and EPD pixel dark current degradation due to surface charge generation rate increase, the interface states density degradation have to be characterized. Proposed method is based on transfer gate interface charge generation rate modu-lated (from accumulation to depletion regime) by TG operating voltage [21] for respective TID.
TG contribution on dark current value can be extracted by suppressing, from total current, the photodiode component eval-uated in strong accumulation as explained in [21]. TG is then considered depleted when it reaches a peak value, as plotted in Fig. 8. The methodology is described in [21], [22], TG contribu-tion behaves as a Gated Diode with VloTG bias. VloTG is here the low level value of the TG pulse. Its peak value is modeled according to the law
(3) with the surface recombination velocity
(4) and
(5) is the surface state density per unit of energy, the depleted area beneath TG, the intrinsic carrier density, the thermal velocity and the capture cross-section.
Experimentally, the influence of the depleted TG on dark cur-rent at respective TID step is extracted by computing the differ-ence between the maximum and minimum values of the curve, and is illustrated in Fig. 8. The ratios of TG dark current ampli-tudes between irradiated samples and preirradiated value pro-vide the trend of Silicon/Silicon oxide interface degradation in respect with charge generation rate rising under TG channel.
B. Correlation Between TG Charge Generation Rate and Mean Dark Current Values for EPD and HPD
The charge generation rate evolution (related to interface states density increase) on EPD and HPD is finally plotted in Fig. 9, as well as the normalized mean dark current values for both sensors. Normalized charge generation rate related to
Fig. 9. Evolution of normalized surface recombination velocity with TID com-paratively with EPD and HPD behaviors.
Fig. 10. Cross-section of 4T pinned photodiode with depleted interfaces both on top and lateral interfaces.
interface states density increase of TG gate oxide seems quali-tatively well correlated with the major part of the degradation beyond for both sensors. This graph highlights the dark current degradation factor versus respective interface state density increase. This degradation factor is much more important for the EPD compared to HPD. These deviations will be discussed more in details in the following part.
C. Physical Mechanisms in the Improved Radiation Hardness of HPD Sensors
This drastic difference in dark current trend could be ex-plained by the photodiode pinning layer type choice. Based on electrons collection, the EPD is built on N-type storage charge layer pinned by surrounding P-type electrode. In a complementary way the HPD is built on P-type storage charge layer pinned by surrounding N-type electrode. The photodiode pinning layers coupled to the storage layers are designed to manage the photodiode as a fully depleted electrostatic well and to contain the dark current generation rate at the
interface. Assuming that total ionizing dose defects like posi-tive charge buildup in oxide and interface defect creation are in the same order of magnitude, positive fixed charges build-up in dielectrics surrounding the diode will have a beneficial electrostatic effect on HPD through electrons concentration increase at the interface. In the opposite way, same amount of positive charges in dielectrics for EPD will decrease hole concentration at the interfaces, doped with pinning layer, leading to surface dark current generation containment relaxation. Thus, as illustrated on Fig. 10, the resulting hole effective density decrease along interface should
add up with the interface state degradation to cause a large increase of mean dark current, especially after .
Inversely, for HPD, the generated positive charges in dielectrics will increase electrons density at the inter-faces. It is assumed that the effective electron density increase for HPD at the interface should partially compensate the higher interface states density. It can be illustrated by the Janesick’s model of dark current induced by P-doped interfaces [20]:
(6) with p the effective majority carrier density at the interface, the doped interface area and the surface recombination velocity defined this time by
(7) Applied to HPD, adapted formula (7) for N-doped interface describes how increase will be balanced by its effective elec-tron density (n) increase at the interface
(8) This results in a much lower dark current increase, depicted in Fig. 9.
Moreover, the hole capture cross-section should be weaker than electron ones: Glunz reported a ratio of 100 between these parameters [23]. It could also explain a similar gap on dark current’s diffusion components between EPD and HPD pixels. As well, some evidence on process conditions such as N-type species segregation [8] strengthen dark current reduction in-duced by interfaces for HPD.
VII. CONCLUSION
Hole based CMOS image sensors have been irradiated with a source related to space environment doses. First results on elementary test structures demonstrated that positive charge accumulation in Pre Metal Dielectrics induced a field effect at the interface, which can be used as benefit in HPD CIS to balance interface state degradation by improving electron ac-cumulation surface density at the PMD interface. This mecha-nism can be generalized to all dielectrics surrounding the pho-todiode. TID induced dark current increases in HPD sensors are reduced compared to its EPD equivalent. Both sensors report a significant increase beyond coming from inter-face states density increase. On HPD, this degradation is held back thanks the increase of electrons carrier density at the in-terface induced by positive charge buildup in oxide. This mech-anism, advantageous for hole collection pinned diode, is detri-mental for electron collection pinned diode. Thus, hole collec-tion pinned photodiode is revealed as an attractive way to im-prove ionizing radiation tolerance of CMOS image sensors. This silicon manufacturing solution is also compatible with small pixel, whereas design hardening solutions often need large pixel sizes. Finally, positive charges accumulation in dielectrics could be a key point for promoting hole collection pinned photodiode
pixel technology on applications in strong ionizing environ-ments, releasing all dose constraints related to depletion phe-nomena at the interfaces. In future works, it would be interesting to quantify the effect of HPD sensors biasing during irradiation and also to check the stability of positive charge build up inside dielectrics.
ACKNOWLEDGMENT
The authors would like to thank process integration and imaging characterization teams for their support on techno-logical aspects and characterization technics and G. Berger from the Université Catholique de Louvain for irradiation campaigns.
REFERENCES
[1] J. Leijtens, J. Leijtens, A. Theuwissen, P. R. Rao, X. Wang, and N. Xie, “Active pixel sensors: The sensor of choice for future space applica-tions,” Proc. SPIE, vol. 6744, 2007.
[2] R. M. Guidash, T. H. Lee, P. P. K. Lee, D. H. Sackett, C. I. Drowley, M. S. Swenson, L. Arbaugh, R. Hollstein, F. Shapiro, and S. Domer, “A CMOS pinned photodiode color imager technology,” in Proc.
Int. Electron Device Meeting (IEDM), 1997, pp. 927–929.
[3] E. Fosssum, “CMOS image sensors: Electronic camera-on-a-chip,”
IEEE Trans. Electron Devices, vol. 44, no. 10, pp. 1689–1698, Oct.
1997.
[4] I. Inoue, H. Nozaki, H. Yamashita, T. Yamaguchi, H. Ishiwata, H. Ihara, R. Miyagawa, H. Miura, N. Nakamura, Y. Egawa, and Y. Matsunaga, “New LV-BPD (Low voltage buried photo-Diode) for CMOS imager,” in Proc. Int. Electron Device Meeting (IEDM), 1999, pp. 883–886. [5] A. El Gamal and E. Eltoukhy, “CMOS image sensors,” IEEE Circuits
Design Mag., vol. 21, no. 3, pp. 6–20, May\Jun. 2005.
[6] M. Innocent, “A radiation tolerant 4T pixel for space applications,” presented at the Proc. Int. Image Sensor Workshop (IISW), Bergen, 2009.
[7] X. Qian, H. Yu, B. Zhao, S. Chen, and K. S. Low, “Design of a radiation tolerant CMOS image sensor,” in Proc. Int. Symp. Integrated Circuits
(ISIC), Dec. 2011, pp. 412–415.
[8] E. Stevens, H. Komori, H. Doan, H. Fujita, J. Kyan, C. Parks, G. Shi, C. Tivarus, and J. Wu, “Low-crosstalk and low-dark-current CMOS image-sensor technology using a hole-based detector,” in Proc. Int.
Solid-State Circuit Conf. (ISSCC), 2008, pp. 60–595.
[9] R. D. McGrath, J. T. Compton, R. M. Guidash, E. T. Nelson, C. Parks, and J. R. Summa, “A pixel front-side-illuminated image sensor for mobile phones,” presented at the Proc. Int. Image Sensor Workshop (IISW), Bergen, 2009.
[10] N. Teranishi, A. Kohono, Y. Ishihara, E. Oda, and K. Arai, “No image lag photodiode structure in the interline CCD image sensor,” IEDM
Tech. Dig., vol. 28, pp. 324–327, Dec. 1982.
[11] B. C. Burkey, W. C. Chang, J. Littlehale, T. H. Lee, T. J. Tredwell, J. P. Lavine, and E. A. Trabka, “The pinned photodiode for an interline-transfer CCD image sensor,” IEDM Tech. Dig., pp. 28–31, Dec. 1984. [12] P. Lee, R. Gee, M. Guidash, T. Lee, and E. R. Fossum, “An active pixel sensor fabricated using CMOS/CCD process technology,” in
Proc. IEEE Workshop CCDs Adv. Image Sens., 1995, pp. 115–119.
[13] T. P. Ma and P. V. Dressendorfer, Ionizing Radiation Effects in MOS
Devices and Circuits. Hoboken, NJ: Wiley, 1989.
[14] A. Tournier, F. Leverd, L. Favennec, C. Perrot, L. Pinzelli, M. Gatefait, N. Cherault, D. Jeanjean, J.-P. Carrere, F. Hirigoyen, L. Grant, and F. Roy, “Pixel-to-Pixel isolation by deep trench technology: Application to CMOS image sensor,” in Proc. Int. Image Sensor Workshop (IISW), Hokkaido, 2011.
[15] V. Goiffon, C. Virmontois, P. Magnan, S. Girard, and P. Paillet, “Anal-ysis of total dose-induced dark current in CMOS image sensors from interface state and trapped charge density measurements,” IEEE Trans.
Nucl. Sci., vol. 57, no. 6, pp. 3087–3094, 2010.
[16] F. Faccio, H. J. Barnaby, X. J. Chen, D. M. Fleetwood, L. Gonella, M. McLain, and R. D. Schrimpf, “Total ionizing dose effects in shallow trench isolation oxides,” Microelectron. Rel., vol. 48, no. 7, pp. 1000–1007, 2008.
[17] D. K. Schroder, Semiconductor Material and Device
Characteriza-tion. Hoboken, NJ: Wiley, 1998.
[18] S. Place, J.-P. Carrere, S. Allegret, P. Magnan, V. Goiffon, and F. Roy, “Radiation effects on CMOS image sensors with sub- pinned pho-todiodes,” IEEE Trans. Nucl. Sci., vol. 59, no. 4, pt. 1, pp. 909–917, Aug. 2012.
[19] T. R. Oldham and F. B. McLean, “Total ionizing dose effects in MOS oxides and devices,” IEEE Trans. Nucl. Sci., vol. 50, no. 3, pp. 483–499, Jun. 2003.
[20] J. R. Janesick, Scientific Charge-Coupled Devices, SPIE. Bellingham, WA: , 2001, pp. 618–621.
[21] H. Han, H. Park, P. Altice, W. Choi, Y. Lim, S. Lee, S. Kang, J. Kim, S. Yoon, and J. Hynecek, “Evaluation of a small negative transfer gate bias on the performance of 4T CMOS image sensor pixels,” presented at the Proc. Int. Image Sensor Workshop (IISW), Session 12, Ogunquit, 2007.
[22] A. S. Grove and D. J. Fitzgerald, “Surface effects on p-n junctions: Characteristics of surface space-charge regions under non-equilibrium conditions,” Solid-State Electron., vol. 9, pp. 783–806, 1966. [23] S. W. Glunz, D. Biro, S. Rein, and W. Warta, “Field-effect passivation
