Optimal Sizing of Modular Multilevel Converters
Thèse
Amin Zabihinejad
Doctorat en génie électrique
Philosophiae Doctor
(Ph. D.)
Québec, Canada
Optimal Sizing of Modular Multilevel Converters
Thèse
Amin Zabihinejad
Sous la direction de:
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iii. Résumé
L’électronique de puissance a pénétré depuis quelques décennies les applications à forte puissance dans de nombreux domaines de l’industrie électrique. Au-delà de l’apparition des technologies d’interrupteur à forte puissance commutable en moyenne tension, ces applications imposaient également des avancées dans le domaine des topologies de convertisseurs statiques : les principaux défis à affronter concernaient l’atteinte de niveaux de tension compatibles avec le domaine de puissance des applications, l’augmentation de la fréquence de commutation apparente en sortie afin d’augmenter la bande passante de la commande, de réduire la taille des éléments de filtrage et de limiter les harmoniques de courant injectés dans le réseau d’alimentation. Les topologies de convertisseurs modulaires multiniveaux (MMC) sont issues de cette problématique de recherche : elles permettent grâce à l’association de cellules de commutation d’atteindre des niveaux de tension exploitables en grande puissance avec les technologies d’interrupteurs existantes, de limiter les fréquences et les pertes de commutation des interrupteurs élémentaires tout en maîtrisant la distorsion harmonique totale (THD). La modularité, la redondance, les degrés de liberté et les fonctionnalités des MMC leur permettent aussi d’augmenter la tolérance aux défauts. Ils pénètrent à présent une large gamme d'applications comme le transport à courant continu en haute tension (HVDC), les systèmes d'énergie renouvelable, les entraînements à vitesse variables de grande puissance, la traction ferroviaire et maritime ainsi que des applications spécifiques très contraignantes en matière de performance dynamique comme les systèmes d’alimentation des électro-aimants dans les accélérateurs de particules.
Les topologies MMC sont composées de cellules de commutation élémentaires utilisant des interrupteurs électroniques tels que le Thyristor à Commande Intégrée (IGCT) standard ou les dernières génération d’IGBT. Les convertisseurs MMC ont fait l’objet de nombreux travaux de recherche et de développement en ce qui concerne les topologies, la modélisation et le calcul du fonctionnement en régime permanent et transitoire, le calcul des pertes, le contenu harmonique des grandeurs électriques et les systèmes de commande et de régulation. Par contre le dimensionnement de ces structures est rarement abordé dans les travaux publiés. Comme la grande majorité des topologies de convertisseurs statiques, les convertisseurs
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MMC sont composés non seulement d’interrupteurs mais aussi d’organes de stockage d’énergie de type composants diélectriques (condensateurs) et magnétiques (inductances, coupleurs) qui sont essentiels pour assurer la conversion des grandeurs électriques en entrée et en sortie. Ces composants ont une forte influence sur la taille, le volume et le rendement des convertisseurs et le dimensionnement optimal de ces derniers résulte souvent de compromis entre la taille des composants passifs, la fréquence et la puissance commutable par les interrupteurs élémentaires.
Le travail de recherche présenté dans ce mémoire concerne le développement d’une méthodologie de dimensionnement optimal et global des MMC intégrant les composants actifs et passifs, respectant les contraintes des spécifications de l’application et maximisant certains objectifs de performance. Cette méthodologie est utilisée pour analyser divers compromis entre le rendement global du convertisseur et sa masse, voire son volume. Ces divers scénarios peuvent être également traduits en termes de coût si l’utilisateur dispose du prix des composants disponibles. Diverses solutions concurrentes mettant en œuvre un nombre de cellules spécifique adaptées à des interrupteurs de caractéristiques différentes en termes de calibre de tension, de courant et de pertes associés peuvent ainsi être comparées sur la base de spécifications d’entrée-sortie identiques. La méthodologie est appliquée au dimensionnement d’un convertisseur MMC utilisé comme étage d’entrée (« Active Front-end » : AFE) d’une alimentation d’électro-aimant pulsée de grande puissance.
Dans une première partie, une méthode de calcul rapide, précise et générique du régime permanent du convertisseur MMC est développée. Elle présente la particularité de prendre en compte la fréquence de commutation contrairement aux approches conventionnelles utilisant la modélisation en valeurs moyennes. Cet outil se révèle très utile dans l’évaluation du contenu harmonique qui est contraint par les spécifications, il constitue le cœur de l’environnement de conception du convertisseur.
Contrairement aux convertisseurs conventionnels, il existe des courants de circulation dans les convertisseurs MMC qui les rendent complexe à analyser. Les inductances de limitation incorporées dans les bras de la topologie sont généralement volumineux et pénalisants en termes de volume et de masse. Il est courant d’utiliser des inductances couplées afin de réduire l'ondulation , la THD et la masse. Dans le travail présenté, un circuit équivalent des inductances couplée tenant compte de l'effet de saturation est développé et intégré à
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l’environnement. L’utilisation d’inductances couplée augmente la complexité de l'analyse du fonctionnement et la précision de leur méthode de dimensionnement est critique pour l’optimisation globale du convertisseur. Un modèle analytique de dimensionnement de ces composants a été développé et intégré dans l’environnement ainsi qu’un modèle de complexité supérieure qui utilise le calcul des champs par éléments finis.
La méthodologie de conception optimale et globale proposée utilise une procédure d’optimisation non linéaire avec contraintes qui pilote l’outil de calcul de régime permanent, le modèles de dimensionnements à plusieurs niveaux de complexité des composants passifs ainsi que d’autres modules permettant de quantifier les régimes de défaut. Pour pallier à la précision réduite des modèles analytiques, une approche d'optimisation hybride est également implantée dans l’environnement. Dans la boucle d'optimisation hybride, le modèle de dimensionnement des inductances peut être corrigé par le modèle de complexité supérieure qui utilise le calcul des champs. On obtient ainsi un meilleure compromis entre la précision de la solution optimale et le temps de convergence de la méthode itérative d’optimisation globale.
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iv. Abstract
In the last decades, power electronics has penetrated high power applications in many areas of the electrical industry. After the emergence of high-voltage semiconductor switch technologies these applications also required advances in the field of static converter topologies: The main challenges were to achieve voltage levels compatible with the application power domain, to increase the apparent switching frequency at the output, to increase the control bandwidth, to reduce the size of the elements of filtering and of limiting the current harmonics injected into the supply network. The topologies of multi-level modular converters (MMC) are based on this research problem: they enable the use of switching cells to achieve high power levels that can be used with existing switch technologies, frequencies and switching losses of the elementary switches while controlling the total harmonic distortion (THD). Modularity, redundancy, degrees of freedom and MMC functionality also allow them to increase fault tolerance. They now penetrated a wide range of applications, such as high-voltage DC (HVDC), renewable energy systems, high-speed variable speed drives, rail and marine traction, and very specific applications in terms of dynamic performance such as electromagnet power systems in particle accelerators.
MMC topologies are composed of elementary switching cells using electronic switches such as the standard Integrated Control Thyristor (IGCT) or the latest generation of IGBTs. MMC converters have been the subject of extensive research and development work on topologies, modeling, and calculation of steady-state and transient operation, loss calculation, the harmonic content of electrical quantities and systems control and regulation functions. On the other hand, the dimensioning methodology of these structures is rarely addressed in the published works.
Like most static converter topologies, MMC converters are composed not only of switches but also passive components of energy storage devices (capacitors) and magnetic (inductors, couplers) that are essential to ensure the conversion of the input and output electrical quantities. These components have a strong influence on the size, the volume and the efficiency of the converters and the optimal dimensioning of the latter often result from a
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compromise between the size of the passive components, the frequency and the power switchable by the elementary switches.
The research presented in this thesis concerns the development of an optimal and comprehensive design methodology for MMCs integrating active and passive components, respecting the constraints of the application specifications and maximizing certain performance objectives. This methodology is used to analyze the various trade-off between the overall efficiency of the converter and its mass, or even its volume. These various scenarios can also be translated into cost if the user has the price of the available components. Various competing solutions using a specific number of cells adapted to switches with different characteristics in terms of voltage, current, and associated losses can thus be compared on the basis of identical input-output specifications. The methodology is applied to the dimensioning of an MMC converter used as an active front-end (AFE) input of a high-power pulsed solenoid high-power supply.
In the first part, a fast, precise and generic method for calculating the steady-state model of MMC converter is developed. It has the particularity of taking into account the switching frequency as opposed to conventional approaches using modeling in mean values. This tool is very useful in evaluating the harmonic content that is constrained by the specifications, it is the heart of the design environment of the converter.
Unlike conventional converters, there are circulation currents in MMC converter structure that make it complex to analyze. The inductors which are used in the arms of the topology are generally bulky and expensive in terms of volume and mass. It is common to use coupled inductors to reduce ripple, THD, and mass. In the presented work, an equivalent circuit of coupled inductances considering the saturation effect is developed and integrated. The use of coupled inductors increases the complexity of the analysis and the precision of its sizing method is critical for the overall optimization of the converter. An analytical model for the dimensioning of these components has been developed and integrated as well as a higher complexity model which uses the finite element method calculation.
The proposed optimal and global design methodology uses a nonlinear optimization procedure with constraints that drive the steady-state computing tool, multi-level design models of passive component complexity, and other modules to quantify the fault state. To compensate the low precision of the analytical models, a hybrid optimization approach is
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also implemented. In the hybrid optimization loop, the inductance-sizing model can be corrected by the higher complexity model that uses finite element computation. A better compromise is thus obtained between the precision of the optimal results and convergence time of the iterative global optimization method.
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List of Contents
iii. Résumé ... iii
iv. Abstract ... vi
List of Contents ... ix
List of Tables xv List of Figures ... xvi
List of Symbols ... xxi
CHAPTER I ... 1
1 Introduction to Multilevel converters ... 1
1.1. Introduction ... 1
1.2. Relevant State of the Art and Problem Description... 4
1.3. History and MMC Definition ... 7
1.4. Description of Multilevel structures ... 9
1.4.1. Neutral Point Clamped (NPC) ... 9
1.4.2. Flying capacitor... 10
1.4.3. Cascaded Multilevel Converters ... 12
1.5. Applications and Industrial Relevance ...17
1.5.1. Multilevel converters and renewable energy ... 19
1.5.2. Multilevel converters and HVDC and FACT systems ... 21
1.5.3. Multilevel converters and Marine propulsion ... 24
1.5.4. Traction motor drive ... 24
1.5.5. Losses analysis of multilevel converters ... 25
1.6. Main Objective: Converter sizing methodology applied to MMC structures of static converters ...26
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1.7.1. Specify the global optimization approach for Optimization of MMC static
converters ... 27
1.7.2. Applying the converter sizing method to an industrial application ... 30
1.7.3. Finding the optimal solution for the MMC AFE converter ... 32
1.7.4. Using the Converter sizing method for other Applications ... 33
1.8. Conclusion ...34
CHAPTER II...35
2 Design of MMC converter based on the load specification ...35
2.1. Introduction ...35
2.2. Calculation of MMC converter variables...36
2.2.1. Converter and sub-module topology ... 36
2.2.2. Converter inputs and outputs variables ... 38
2.2.3. Semiconductor sizing in steady state ... 39
2.2.4. Passive components sizing in steady state ... 41
2.3. Investigation of adjustable parameters of multilevel converter ...43
2.3.1. Converter topology ... 43
2.3.2. Number of sub-modules per arm ... 43
2.3.3. Passive component values ... 44
2.3.4. IGBT selection ... 45
2.4. Investigation of converter performance and limitations ...45
2.4.1. Converter Losses and efficiency ... 45
2.4.2. Power quality and harmonic Investigation ... 46
2.4.3 . Converter volume and mass... 47
2.5. Comprehensive analysis of MMC converter ...47
2.5.1. Circuit Analysis... 48
2.5.2. Electromagnetic Analysis ... 49
2.5.3. Thermal Analysis ... 50
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2.6.1. Capacitor dimensioning analysis ... 51
2.6.2. Inductance dimensioning analysis ... 52
2.7. MMC Multiphase Analysis ...53
2.7.1. Global analysis using analytical model ... 53
2.7.2. Global analysis using modified analytical model ... 55
2.8. Optimal sizing of MMC converter ...56
2.9. Conclusion ...60
CHAPTER III ...61
3 Circuit Model of Modular Multilevel AFE...61
3.1. Introduction ...61
3.2. Steady-State Average Model of Modular Multilevel Active-Front-End Converter 62 3.2.1. Sub-module circuit analysis ... 62
3.2.2. Single phase average model parameters ... 63
3.2.3. Average switching function ... 64
3.2.4. Circulating current and capacitor voltage ripple estimation ... 66
3.2.5. Advantages and disadvantages of steady-state average model of MMC Active-Front-End ... 68
3.3. Time-domain steady-state model of Modular Multilevel Active-Front-End ...69
3.3.1. Sub-module switching function ... 69
3.3.2. Time-domain state equations ... 69
3.3.3. Proposed time-domain model ... 70
3.4. Steady-State Model Verification using Simulink ...72
3.5. Conclusion ...74
CHAPTER IV ...76
4 Electromagnetic and Dimensioning Analysis of Passive Components ...76
4.1. Introduction ...76
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4.2.1. Capacitor Mass Function ... 77
4.2.2. Transient Equivalent Model of Capacitor ... 78
4.3. Dimensioning Analysis of Inductor ...80
4.3.1. Core Topologies ... 80
4.3.2. Magnetic Equivalent Circuit (type 1) ... 81
4.3.3. Magnetic Equivalent Circuit (type 2) ... 82
4.3.4. Inductance and Resistance Estimation ... 84
4.3.5. Volume and Mass Function ... 86
4.4. Inductor Thermal Analysis ...86
4.4.1. Inductor Losses ... 86
4.4.2. Thermal Model of Inductor ... 92
4.5. Investigation the effect of core saturation ...94
4.5.1. Finding the Mathematical Core Magnetizing Function ... 95
4.5.2. Inductance circuit Equation Considering Core Saturation ... 95
4.6. Finite Element Analysis of Coupled Inductors ...96
4.6.1. Magneto-static Analysis using Finite Element Method ... 96
4.6.2. Correction of Analytical Model using Finite Element Method ... 98
4.7. Conclusion ... 100
CHAPTER V ... 102
5 Converter Analysis in the Fault Condition ... 102
5.1. Introduction ... 102
5.2. Investigation of Standard Defects in MMC Converter ... 102
5.2.1. DC Link Fault ... 102
5.2.2. Sub-module Fault ... 103
5.2.3. Inductance Fault ... 104
5.3. Close Loop Control of MMC converter using Simulink ... 104
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5.5. Combination of Time-Domain Steady-State Model and Faults in the unit package
... 109
5.5.1. Sub-module faults investigation ... 109
5.5.2. Proposed global optimization considering fault analysis ... 111
5.6. Conclusion ... 111
CHAPTER VI ... 113
6 Optimal Design of Modular Multilevel Converter ... 113
6.1. Introduction ... 113
6.2. Optimization algorithm using numerical solver ... 114
6.3. Load Specification of the MMC Active Front End converter application ... 116
6.4. Constraints Calculation ... 117
6.4.1. Sub-module capacitor voltage ripple... 117
6.4.2. THD ... 117
6.4.3. Semiconductor Losses ... 117
6.4.4. Inductor Losses ... 118
6.5. Goal function ... 118
6.6. MMC Optimization using analytical circuit model ... 119
6.6.1. Optimization algorithm ... 119
6.7. Optimal design of modular multilevel converter using dimensioning model .. 121
6.7.1 . Global Mass Minimization Algorithm ... 121
6.8. Hybrid Optimization Model using 2-D FEM ... 123
6.8.1. Hybrid Global Optimization Algorithm ... 124
6.8.2. Hybrid Global Optimization Algorithm considering fault margin ... 125
6.9. Conclusion ... 126
CHAPTER VII ... 128
7 Investigation of Optimization Results ... 128
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7.2. High power IGBT specifications ... 129
7.3. Optimization results using proposed time-domain circuit model... 130
7.4. Mass Minimization of Modular Multilevel Converter ... 134
7.4.1. Selection of inductor core topology ... 136
7.4.2. Optimization using 3.3KV/1500A IGBT ... 137
7.4.3. Optimization using 6.5KV/750A IGBT ... 140
7.5. Optimization Results using Hybrid Analytical Model ... 143
7.5.1. Optimization results using 3.3KV/1500A IGBT ... 144
7.5.2. Optimization results using 6.5 kV/750 A IGBT ... 148
7.6. Parameter sensitivity analysis ... 150
7.6.1. Sensitivity analysis of maximum Temperature Rise ... 151
7.6.2. Investigation the effect of maximum Flux Density on Converter Mass .... 153
7.6.3. Investigation the effect of maximum THD on Converter Mass ... 154
7.6.4. Investigation of the effect of Capacitor Voltage Ripple on Converter Mass ... ... 156
7.6.5. Sensitivity analysis converter mass against Fault margin ... 157
7.7. Conclusion ... 159
CHAPTER VIII ... 160
8 Conclusion and Future Researches ... 160
8.1. Conclusion ... 160
8.2. Future Researches ... 163
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List of Tables
Table 1.1: Some of the today’s MMC projects ...18
Table 1.2: ABB SVC Light for electrical transmission grids ...23
Table 3.1 The MMC converter parameters and operating point ...72
Table 4.1: Calculated coefficients using fitting algorithm ...78
Table 4.2: Rac/Rdc of copper conductor with 13.21mm diameter in 50Hz, 100Hz and 200Hz using three estimation methods ...91
Table 4.3: Calculation of conductor copper losses using the estimated AC resistances and error calculation compared to utilization of DC resistance ...92
Table 5.1: Simulation parameters of MMC converter in simpower ... 106
Table 5.2: Normal operation of a half-bridge sub-module... 109
Table 5.3 Investigation of Open-Circuit Fault in T1 ... 110
Table 5.4 Investigation of Open-Circuit Fault in T2 ... 110
Table 5.5 Investigation of Short-Circuit Faults in T1 or T2 ... 111
Table 6.1: Load specification of MMC Active Front End converter application... 116
Table 6.2 The main optimization constraints ... 120
Table 6.3: List of optimization variables ... 122
Table 6.4: List of main constraints in optimization algorithm ... 123
Table 7.1 Technical specifications of high power IGBTs ... 130
Table 7.2: Comparison of total mass of two different inductor core topologies ... 137
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List of Figures
Figure 1.1: Multilevel neutral point clamped converter... 9
Figure 1.2: Multilevel flying capacitor topology ...11
Figure 1.3: Multilevel cascaded converter with elementary converters ...12
Figure 1.4: Typical configuration of sub-module (Commutation Cell) ...13
Figure 1.5: Single-leg multilevel converter ...14
Figure 1.6: Multi-leg multilevel converter ...15
Figure 1.7: Single-leg two levels converter with interleaving inductors ...16
Figure 1.8: MMC converter with interleaving inductors ...17
Figure 1.9: Single-line schematic diagram of the proposed multilevel converter-based wind energy conversion system [28] ...20
Figure 1.10: Multilevel inverter topology proposed for solar energy systems [32] ...21
Figure 1.11: The modular cascaded multilevel converter used by Siemens Company for HVDC application [33] ...22
Figure 1.12: Three-phase five-level structure of a diode-clamped multilevel converter [36] ...23
Figure 1.13: Multilevel converter in electric marine propulsion system [39] ...24
Figure 1.14: 6-level diode-clamped back to back converter for traction motor drive [15] ...25
Figure 1.15: Optimization and verification loop ...28
Figure 1.16: Optimization and verification loop ...30
Figure 1.17: Multi-megawatt power supply of the PS Booster ...31
Figure 1.18: Electromagnet Current pulsed Cycle delivered by the Multilevel H-bridge converter ...31
Figure 1.19: Corresponding capacitor voltage cycle in the DC bus ...31
Figure 1.20: Example of High Power Converter in CERN complex...33
Figure 2.1 Modular multilevel active front-end converter ...37
Figure 2.2 a)half-bridge sub-module configuration b)full-bridge sub-module configuration ...37
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Figure 2.4 Thermal dissipation circuit of IGBT ...41
Figure 2.5 MMC circuit model and input/output variables ...48
Figure 2.6 Analytical electromagnetic model of arm inductance and its input/output ...49
Figure 2.7 Proposed model for electromagnetic analysis includes analytical model and finite element analysis ...50
Figure 2.8 The analytical thermal model of MMC converter ...51
Figure 2.9 The magnetic core topology ...52
Figure 2.10 Global analysis plan of MMC converter using analytical models ...54
Figure 2.11 Global analysis plan of MMC converter using finite element correction loop .55 Figure 2.12 First proposed optimization plan of MMC converter...57
Figure 2.13 Second proposed optimization plan using analytical inductor model ...58
Figure 2.14 Third optimization plan includes the correction loop using FEM ...59
Figure 3.1: MMC-based topology of the Multi-megawatt power supply of Fig.1.17 ...62
Figure 3.2: half-bridge sub-module topology ...63
Figure 3.3: Single phase average equivalent circuit ...64
Figure 3.4: initializing diagram using average steady-state model ...71
Figure 3.5: Diagram of Time-domain analytical model ...72
Figure 3.6: The sub-module capacitor current using analytical model and Simulink ...73
Figure 3.7: The sub-module capacitor voltage using analytical model and Simulink ...73
Figure 3.8: The lower and upper arm current using analytical model and Simulink ...74
Figure 3.9: The input line current using analytical model and Simulink ...74
Figure 4.1 Cylindrical capacitor of VISHAY Company designed for power electronic applications ...77
Figure 4.2: Capacitor weight versus the capacitance and maximum voltage value ...78
Figure 4.3 The simple model of high power capacitor ...79
Figure 4.4 The modified high power capacitor model ...80
Figure 4.5: The proposed core topologies for independent and dependent mutual inductances ...81
Figure 4.6 The equivalent magnetic circuit of inductance (type 1) ...81
Figure 4.7: The inductor core topology and sizing parameters ...83
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Figure 4.9: AC resistance of round copper conductor versus conductor diameter using exact
equation ...89
Figure 4.10: AC resistance of round copper conductor versus conductor diameter using simplified equation ...89
Figure 4.11 AC resistance of round copper conductor versus conductor diameter using IEC standard equation ...90
Figure 4.12: Finite element analysis of skin effect ...91
Figure 4.13: Inductor equivalent thermal circuit ...92
Figure 4.14: The B-H curve of iron sheet core ...94
Figure 4.15: Finite element analysis of coupled arm inductance ...97
Figure 4.16: The flowchart of the proposed correction approach ... 100
Figure 5.1: The DC link fault and currents path in the converter ... 103
Figure 5.2: Various kind of sub-module faults ... 104
Figure 5.3 Close loop control diagram of MMC converter... 105
Figure 5.4: DC Link voltage variation via various converter faults ... 106
Figure 5.5: Line current variation via various converter faults ... 107
Figure 5.6: Upper inductor current variation via various converter fault ... 108
Figure 5.7: Magnetic flux density of inductor core via various converter fault ... 108
Figure 6.1: Implementation of Global Optimization Algorithm with Microsoft Excel ... 115
Figure 6.2: Optimization flowchart of MMC converter... 120
Figure 6.3: The proposed global optimization algorithm using analytical model ... 121
Figure 6.4: The proposed hybrid optimization algorithm ... 124
Figure 6.5 Global optimization algorithm considering fault margin ... 125
Figure 6.6 Hybrid optimization algorithm considering the fault margin ... 126
Figure 7.1: Electric energy stored in the capacitors versus the number of sub-module per arm ... 131
Figure 7.2: Magnetic energy stored in the inductors versus the number of sub-module per arm ... 131
Figure 7.3: Total energy stored in the converter versus the number of sub-module per arm ... 132
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Figure 7.5: Optimal switching frequency versus the number of sub-modules per arm ... 133
Figure 7.6: Sub-module capacitor ripple versus capacitor energy and sub-module number ... 133
Figure 7.7: Contour of capacitor ripple versus capacitor energy and sub-module number 134 Figure 7.8: THD and total efficiency versus coupling factor ... 134
Figure 7.9: MMC topology using 3.3 kV/1500 A IGBT ... 135
Figure 7.10: MMC topology using 6.5 kV/750 A IGBT ... 136
Figure 7.11: Optimal arm inductance value versus number of sub-modules per arm ... 138
Figure 7.12: Optimal sub-module capacitor value versus number of sub-modules per arm ... 138
Figure 7.13: Optimal total inductor mass versus number of sub-modules per arm ... 139
Figure 7.14: Optimal total capacitor mass versus number of sub-modules per arm ... 139
Figure 7.15: Optimal converter mass versus number of sub-modules per arm ... 140
Figure 7.16 The optimal arm inductance versus the number of sub-modules per arm ... 141
Figure 7.17 Optimal value of the sub-module capacitor versus the number of sub-modules per arm ... 141
Figure 7.18 Total inductor mass versus the number of sub-modules per arm ... 142
Figure 7.19 Total capacitor mass versus the number of sub-modules per arm ... 142
Figure 7.20 Total converter mass versus the number of sub-modules per arm ... 143
Figure 7.21: The optimal arm inductance value versus the sub-modules per arm ... 144
Figure 7.22: The optimal sub-module capacitor value versus the sub-modules per arm ... 145
Figure 7.23: The optimal arm inductance mass versus the sub-modules per arm ... 146
Figure 7.24: The optimal capacitor mass versus the sub-modules per arm ... 146
Figure 7.25: The optimal converter mass versus the sub-modules per arm ... 147
Figure 7.26: Total converter efficiency versus the sub-modules per arm ... 147
Figure 7.27 Total inductor mass versus the number of sub-modules per arm ... 148
Figure 7.28 The total sub-module capacitor mass versus the number of sub-module per arm ... 149
Figure 7.29 Total converter mass versus the number of sub-modules per arm ... 150
Figure 7.30 Total converter efficiency versus the number of sub-modules per arm ... 150
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Figure 7.32: Total converter mass versus the maximum temperature rise ... 152
Figure 7.33: The contour of optimal inductor mass versus the sub-modules number and the maximum flux density ... 153
Figure 7.34 The discontinuity value versus number of sub-modules per arm ... 154
Figure 7.35 The THD value of input current versus the arm inductance value ... 155
Figure 7.36 The total inductor mass versus the arm inductance value ... 156
Figure 7.37: The total converter mass versus the capacitor ripple ... 157
Figure 7.38 Total converter mass sensitivity against fault margin for 3.3KV IGBT ... 158
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List of Symbols
𝐴𝑐 Core section of magnetic circuit [𝑚2]
𝐴𝑐𝑢 Wire section area [𝑚2]
𝐴𝑒 The effective value of core section of magnetic circuit [𝑚2]
𝐴𝑤𝑇 Total copper section of each winding [𝑚2]
𝑎 Core window width [𝑚]
𝑏 Core window height [𝑚]
𝐵 Magnetic flux density [𝑇]
𝐵ℎ1𝑚𝑎𝑥 Maximum flux density of first harmonic [𝑇]
𝐵ℎ2𝑚𝑎𝑥 Maximum flux density of second harmonic [𝑇]
𝐵𝑚𝑎𝑥 Maximum magnetic flux density [𝑇]
𝐵𝑙𝑖𝑛𝑒𝑎𝑟 Linear flux density of the core [𝑇]
𝐵𝑛𝑜𝑙𝑖𝑛𝑒𝑎𝑟 Flux density in the saturation region [𝑇]
𝐵𝑠𝑎𝑡 Saturation flux density [𝑇]
𝑐 Inductor core depth [𝑚]
𝐶 Capacitor value [𝐹]
𝐶𝑎𝑟𝑚 Arm capacitor value [𝐹]
𝐶𝑠𝑚 Sub-module capacitor value [𝐹]
𝐶1 The capacitance between the anode and cathode of the capacitor
[𝐹]
𝐶2 Correction capacitor [𝐹]
𝑑 Core Width [𝑚]
𝑑𝑐 Conductor diameter [𝑚]
𝐸𝑐𝑚𝑎𝑥 Maximum energy stored in capacitors [𝐽]
𝐸𝑐𝑎𝑝 Electrical energy of capacitors [𝐽]
𝐸𝑐𝑜𝑛𝑣 Total energy stored in converter [𝐽]
𝐸𝑖𝑛𝑑 Magnetic energy stored in the inductors [𝐽]
𝐸𝑜𝑛𝑖 Turn-on energy losses of IGBT [𝐽]
xxii
𝐸𝑜𝑓𝑓𝑖 Turn-off energy losses of IGBT [𝐽]
𝐸𝑜𝑓𝑓𝑑 Turn-off energy losses of diode [𝐽]
𝐸𝑢 Unit capacitor voltage [𝑉]
𝐸𝑃 Energy Power ration
𝑓𝑠 AC source frequency [𝐻𝑧]
𝑓𝑠𝑤 Switching frequency [𝐻𝑧]
𝐹𝑇 Fault time constant [𝑠𝑒𝑐]
ℎ Even-order harmonics
ℎ𝑓𝑒 Heat transfer coefficient of iron core ℎ𝑐𝑢 Heat transfer coefficient of copper
ℎ𝑓𝑒−𝑐𝑢 Heat transfer coefficient between core and copper
𝐻 Magnetic field value [𝐴/𝑚]
𝐻𝑙𝑖𝑛𝑒𝑎𝑟 Linear magnetic field [𝐴/𝑚]
𝐻𝑠𝑎𝑡 Saturation magnetic field [𝐴/𝑚]
𝐼𝑎 AC phase current of phase a (peak) [𝐴]
𝐼1 The current of first winding [𝐴]
𝐼2 The current of second winding [𝐴]
𝑖𝑎𝑏𝑐 Instantaneous three phase AC line currents [𝐴]
𝐼𝑎𝑢 Upper arm current of phase a (peak) [𝐴]
𝐼𝑎𝑙 Lower arm current of phase a (peak) [𝐴]
𝑖𝑐𝑒 Collector-emitter current of IGBT [𝐴]
𝐼𝑐𝑢 Capacitor current of upper sub-modules (peak) [𝐴]
𝐼𝑐𝑢𝑖 Capacitor current of ith upper sub-modules (peak) [𝐴] 𝐼𝑐𝑙 Capacitor current of lower sub-module (peak) [𝐴] 𝐼𝑐𝑙𝑖 Capacitor current of ith lower sub-module (peak) [𝐴]
𝐼𝑐𝑖𝑟𝑐 Circulation current (peak) [𝐴]
𝐼𝑐𝑖𝑟𝑐ℎ2 Second harmonic of circulation current (peak) [𝐴]
𝐼𝑑𝑐 DC link current (peak) [𝐴]
𝑖𝑑𝑐 Instantaneous DC link current [𝐴]
xxiii
𝐼𝑐𝑙ℎ1 Main component of capacitor current (peak) [𝐴] 𝐼𝑐𝑖𝑟𝑐𝑑𝑐 DC component of circulation current (peak) [𝐴]
𝐼𝑓 Fault current (peak) [𝐴]
𝑖𝐹𝐷 Diode forward current [𝐴]
𝐼𝐿 Inductor current (peak) [𝐴]
𝐼𝑛𝑓 No fault current [𝐴]
𝑖𝑜𝑢𝑡 Instantaneous load current [𝐴]
𝐼𝑎𝑟𝑚𝑟𝑚𝑠 Effective value of arm current [𝐴]
𝐼𝑟𝑚𝑠 Effective value of first winding current [𝐴]
𝐼𝑟𝑚𝑠ℎ1 Effective value of first harmonic of winding current [𝐴] 𝐼𝑟𝑚𝑠ℎ2 Effective value of second harmonic of winding current [𝐴] 𝐼𝑟𝑚𝑠ℎ4 Effective value of fourth harmonic of winding current [𝐴]
𝐼𝑠1 Main switch current [𝐴]
𝐼𝑠2 Bypass switch current [𝐴]
𝐼𝑠𝑚 Submodule current [𝐴]
𝐼𝑢 Upper arm current [𝐴]
𝐽 Current density of inductor [𝐴/𝑚2]
𝐾𝑚𝑢 Estimated Coupling factor
𝑘𝑤 Filling factor of inductor winding 𝐾ℎ Hysteresis losses coefficient
𝐾𝑒 Eddy current losses coefficient
𝐾𝑐 Correction coefficient of analytical model
𝐾𝑠 AC resistance coefficient 𝐾𝑠𝑎𝑡 Core saturation coefficient
𝑙𝑐 The magnetic length of the core considering air gap [𝑚]
𝑙𝑚 The magnetic length of the core [𝑚]
𝑙𝑒 Effective value of magnetic circuit length [𝑚]
𝑙𝑔 Air gap length [𝑚]
𝑙𝑔1 Left and right leg air gap length [𝑚]
xxiv
𝑙𝑖𝑠𝑜 Isolation thickness [𝑚]
𝐿 Inductance value [𝐻]
𝐿11 Self-inductance value [𝐻]
𝐿12 Mutual inductance value [𝐻]
𝐿21 Mutual inductance value [𝐻]
𝐿𝑎𝑛 Inductance value from analytical model [𝐻]
𝐿𝑓𝑒𝑚 Inductance value from FEM calculation [𝐻]
𝐿𝑐 Inductance of capacitor [𝐻]
𝑀 Mutual inductance [𝐻]
𝑀𝑖𝑛𝑑 Inductance total mass [𝐾𝑔]
𝑀𝑐𝑎𝑝 Capacitor mass [𝐾𝑔]
𝑀𝑐𝑎𝑝−𝑇 Capacitor total mass [𝐾𝑔]
𝑀𝑤𝑖𝑛𝑑𝑖𝑛𝑔 Copper mass [𝐾𝑔]
𝑀𝑐𝑜𝑟𝑒 Core mass [𝐾𝑔]
𝑀𝐼𝐺𝐵𝑇 IGBT mass [𝐾𝑔]
𝑀𝐼𝐺𝐵𝑇−𝑇 Total IGBT mass [𝐾𝑔]
MLT Mean length per turn [𝑚]
𝑁 Number of parallel arms 𝑛 Inductor turn number 𝑛1 First winding turn number 𝑚 Number of sub-modules per arm
𝑃𝑎𝑐 Active power of AC side [𝑊]
𝑃𝑑𝑐 Power of DC side [𝑊]
𝑃𝑐𝑢 Copper losses [𝑊]
𝑃𝑐𝑢𝑇 Total inductor copper losses [𝑊]
𝑃𝑒 Eddy current losses [𝑊]
𝑃ℎ Hysteresis losses [𝑊]
𝑃𝐼𝐺𝐵𝑇−𝑇 Total IGBT Losses [𝑊]
𝑃𝑐 Total conduction losses of semiconductor switch [𝑊]
xxv
𝑃𝑐𝑖 Conduction losses of IGBT [𝑊]
𝑃𝑐𝑑𝑇 Total conduction losses of diode [𝑊]
𝑃𝑐𝑑 Conduction losses of diode [𝑊]
𝑃𝑠𝑤 Total switching losses of semiconductor switch [𝑊]
𝑃𝑠𝑤𝑖 Switching losses of IGBT [𝑊]
𝑃𝑠𝑤𝑑 Switching losses of diode [𝑊]
𝑞 Conductor constant
𝑅1 Left side core reluctance of the core [𝐻−1]
𝑅2 Right side core reluctance of the core [𝐻−1]
𝑅3 Center core reluctance of the core [𝐻−1]
𝑅4 Right side core reluctance of the core [𝐻−1]
𝑅5 Left side core reluctance of the core [𝐻−1]
𝑅𝑎 Capacitor equivalent resistance [𝑜ℎ𝑚]
𝑅𝑎𝑐 AC resistance of the winding [𝑜ℎ𝑚]
𝑅𝑎𝑐1 AC resistance of the conductor in the main frequency [𝑜ℎ𝑚] 𝑅𝑎𝑐2 AC resistance of the conductor in the second harmonic [𝑜ℎ𝑚]
𝑅𝑎𝑐4 AC resistance of the conductor in the fourth harmonic [𝑜ℎ𝑚]
𝑅𝑎𝑔 Air gap reluctance [𝐻−1]
𝑅𝑙𝑔1 Center leg air gap reluctance [𝐻−1]
𝑅𝑙𝑔2 Side leg air gap reluctance [𝐻−1]
𝑅𝑏 Modeling resistance [𝑜ℎ𝑚]
𝑅𝑐 Dielectric leakage resistance [𝑜ℎ𝑚]
𝑅𝑐𝑜𝑟𝑒 Magnetic core reluctance [𝐻−1]
𝑅𝐿1 Inductor winding resistance [𝑜ℎ𝑚]
𝑅𝑇 Total magnetic reluctance [𝐻−1]
𝑅2𝑎 Compensation resistance [𝑜ℎ𝑚]
𝑅2𝑐 Compensation resistance [𝑜ℎ𝑚]
𝑅𝑐𝑢−𝑎𝑖𝑟 Thermal resistivity of copper [𝑚2℃/𝑊]
𝑅𝑑𝑐 DC resistance of the winding [𝑜ℎ𝑚]
xxvi
𝑅𝑓𝑒−𝑐𝑢 Thermal resistivity of core and copper [𝑚2℃/𝑊]
𝑅𝑗𝑐 Junction-case thermal resistance [𝑚2℃/𝑊]
𝑅𝑐𝑠 Case-Sink thermal resistance [𝑚2℃/𝑊]
𝑅𝑠𝑎 Sink-air thermal resistance [𝑚2℃/𝑊]
𝑟 Conductor radius [𝑚]
𝑆𝑎𝑙 Switching function of lower arm
𝑆𝑎𝑢 Switching function of upper arm
𝑆𝑐𝑢 Copper external area [𝑚2]
𝑆𝑓𝑒 Core external area [𝑚2]
𝑆𝑓𝑒−𝑐𝑢 The area between the core and copper [𝑚2]
𝑆𝑚 Modulation index
𝑆𝑛 Nominal power [𝑉𝐴]
𝑆𝑢𝑖 Switching function of ith submodule of upper arm 𝑆𝑙𝑖 Switching function of ith submodule of lower arm
𝑇𝑎 Ambient temperature [℃]
𝑇𝑐𝑢 Copper temperature [℃]
𝑇𝑐𝑢𝑚𝑎𝑥 Maximum copper temperature [℃]
𝑇𝑓𝑒 Core temperature [℃]
𝑇𝐻𝐷 Total harmonic distortion [%]
𝑣𝑎𝑏𝑐 Instantaneous three phase AC voltage [𝑉]
𝑉𝑐 Submodule capacitor voltage [𝑉]
𝑣𝑐𝑒 Collector-emitter voltage of IGBT [𝑉]
𝑉𝑐𝑢 Upper side submodule capacitor voltage [𝑉]
𝑉𝑐𝑢𝑖 Upper side ith submodule capacitor voltage [𝑉]
𝑉𝑐𝑙 Lower side submodule capacitor voltage [𝑉]
𝑉𝑐𝑙𝑖 Lower side ith submodule capacitor voltage [𝑉]
𝑉𝑐𝑜𝑟𝑒 Total core volume [𝑚3]
𝑣𝐹 Forward conduction voltage of diode [𝑉]
𝑣𝑑 D-axis AC voltage [𝑉]
xxvii
𝑣𝑑𝑐 Instantaneous DC link voltage [𝑉]
𝑉𝑙 Lower arm voltage [𝑉]
𝑉𝐿 Inductance voltage [𝑉]
𝑉𝐿−𝐿,𝑟𝑚𝑠 Line to line rms voltage [𝑉]
𝑉𝑢𝑇 Total upper submodule voltage [𝑉]
𝑉𝐿𝑢 Upper arm inductance voltage [𝑉]
𝑉𝐿𝑙 Lower arm inductance voltage [𝑉]
𝑉𝑙𝑖 Voltage of ith submodule in lower arm [𝑉]
𝑉𝑙𝑠 Lower side submodule voltage [𝑉]
𝑉𝐼𝐺𝐵𝑇 IGBT voltage value [𝑉]
𝑉𝑜 Terminal voltage [𝑉]
𝑉𝑜𝑢𝑡 Out put converter voltage [𝑉]
𝑣𝑞 Q-axis voltage of AC side [𝑉]
𝑉𝑠𝑚 Submodule terminal voltage [𝑉]
𝑉𝑢 Upper arm voltage [𝑉]
𝑉𝑢𝑇 Total upper submodule voltage [𝑉]
𝑉𝑢𝑖 Voltage of ith submodule in upper arm [𝑉]
𝑉𝑢𝑠 Upper side submodule voltage [𝑉]
𝑉𝑤𝑖𝑛𝑑𝑖𝑛𝑔 Total copper volume [𝑚3]
𝑥𝑠 AC resistance IEEE constant 𝑦𝑠 AC resistance IEEE constant
𝜔1 Circular frequency of AC source [𝑟𝑎𝑑/𝑠𝑒𝑐]
𝜃1 Phase of the main component of arm current [𝑟𝑎𝑑]
𝜃2 Phase of second harmonic of arm current [𝑟𝑎𝑑]
Δ𝑉𝑐𝑢ℎ1 Main component of upper sub-module capacitor voltage [𝑉]
Δ𝑉𝑐𝑙ℎ1 Main component of lower sub-module capacitor voltage [𝑉] Δ𝑉𝑐𝑢ℎ2 Second harmonic of upper sub-module capacitor voltage [𝑉] Δ𝑉𝑐𝑙ℎ2 Second harmonic of lower sub-module capacitor voltage [𝑉]
Δ𝑉𝑐𝑢ℎ3 Third harmonic of upper sub-module capacitor voltage [𝑉]
xxviii
Δ𝑉𝑎𝑟𝑚 Arm voltage ripple [𝑉]
Δ𝑉𝑎𝑟𝑚𝑑𝑐 DC component of arm voltage [𝑉]
Δ𝑉𝑎𝑟𝑚ℎ2 Second harmonic of arm voltage [𝑉]
Δ𝑉𝑎𝑟𝑚ℎ4 Fourth harmonic of arm voltage [𝑉]
Δ𝑡 Fault period [𝑠𝑒𝑐]
Δ𝑇 Inductor temprature rise [℃]
𝜇0 Vacuum permeability [𝐻/𝑚]
𝜇𝑟 Core permeability
𝜂 Converter efficiency [%]
𝜙 Core flux [𝑊𝑏]
𝜙1 Core flux of first winding [𝑊𝑏]
𝜙11 First winding flux of first winding current [𝑊𝑏] 𝜙12 First winding flux of second winding current [𝑊𝑏]
𝜙21 Second winding flux of first winding current [𝑊𝑏]
𝜌𝑐𝑢 Electrical resistivity [𝛺. 𝑚]
𝜌0 Copper electrical resistivity constant at 25℃ [𝛺. 𝑚]
𝐷𝑐𝑜𝑟𝑒 Iron volumetric mass [𝑘𝑔/𝑚3]
𝐷𝑤𝑖𝑛𝑑𝑖𝑛𝑔 Copper volumetric mass [𝑘𝑔/𝑚3]
𝛼 Hysteresis losses field constant
𝜀
25 Copper resistivity coefficient at 25℃𝛽 Eddy current losses frequency constant 𝛾 Eddy current losses field constant
𝜎 Copper conductivity [𝛺. 𝑚]−1
𝜆 Thermal conduction factor of the isolation 𝛿 Air gap correction coefficient
1
CHAPTER I
1
Introduction to Multilevel converters
1.1. Introduction
Recently, multilevel converters have emerged as an interesting solution in the power industry. The general structure of the multilevel converter is to synthesize a sinusoidal voltage from several levels of voltages, typically obtained from capacitor voltage sources. For several years, multilevel voltage source converters allow working at the high voltage level and producing a quasi-sinusoidal voltage waveform. Classical multilevel topologies such as NPC and Flying Capacitor VSIs were introduced twenty years ago, and are widely used in Medium Power applications such as traction drives nowadays. In the scope of High Voltage AC/DC converters, the Modular Multilevel Converter (MMC), proposed ten years ago, by Professor R. Marquardt from the University of Munich (Germany), appeared particularly interesting for HVDC transmissions. On the base of the MMC principle, this thesis considers different topologies of elementary cells, which make the High Voltage AC/DC converter more flexible to achieve different voltage and current levels.
Trends in power semiconductor technology indicate a trade off in the selection of power devices in terms of switching frequency and voltage sustaining capability. New multi-level high-power converter topologies have been proposed using a hybrid approach involving integrated gate commutated thyristors (IGCTs) or gate turned off thyristors (GTOs) and insulated gate bipolar transistors (IGBTs) operation in synergism. The new multilevel power conversion concept combines the flexibility of the frequency converter with the robustness of the industrial active neutral point clamped converter (ANPC) to generate multilevel voltages.
In recent years, the industry has begun to demand higher power equipment, which now reaches the megawatt level. Controlled ac drives in the megawatt range are usually connected
2
to the medium-voltage network. Today, it is hard to connect a single power semiconductor switch directly to medium voltage grids (2.3, 3.3, 4.16, or 6.9 kV). For these reasons, a new family of multilevel converters has emerged as the solution for working at higher voltage levels [1].
Multilevel converters are one of the best solutions in order to use in the high voltage applications. Increasing the demands for high power converters in order to connect to the grid for renewable energy systems, HVDC and other applications made multi-level converters topology more suitable than two-level PWM rectifier [2].
Using multilevel converters is increasing more and more, especially in high power industries of electric power conversion. Multilevel converters are customized for a wide range of applications, such as extruders, compressors, conveyors, crushers, pumps, grinding mills, fans, rolling mills, blast furnace blowers, gas turbine starters, mixers, mine hoists, reactive power compensation, marine propulsion, high-voltage direct-current (HVDC) transmission, hydro pumped storage, wind energy conversion, and railway traction [2].
Multilevel converters provide us a lot of challenges and offer a wide range of possibilities. Researchers are trying to further improve them in the fields of efficiency, reliability, power density, simplicity, and cost of multilevel converters and its dimension.
Recently, the interleaved converters with coupled-inductors have been widely used in medium- to low-power applications, mainly to increase the output current, while the current ripple in power devices reduces. Using the interleave technique; the size of converter’s passive components (inductances and capacitances) and the harmonic content of output voltage are considerably decreased with respect to the classical approach.
There are many publications in the field of MMC converters. In the past decade, due to increasing the demands of MMC converters, researchers investigated the multilevel converter from a different point of view. These converters have been analyzed in order to use in the various applications such as HVDC, electric vehicle, renewable energy system and etc. also, new modulation approaches and modern control strategies have been proposed to increase the power quality and decrease the harmonics.
One of the interesting subjects is to estimate the losses of multilevel converters. Due to its complex topology, researchers proposed various losses models based on its topology and switch type. According to use the multilevel converter in high power application, its final
3
dimension is very big and bulky. Also, utilization of different components such as the semiconductor switch, coupled inductor, heat sinks, capacitors, bus bars and other accessories makes it very difficult to implement. The analysis which is used to find the best component value of the multilevel converter in order to achieve the minimum dimension is called “converter sizing analysis.” Therefore, the dimensioning analysis will be an important part of the design procedure.
In literature, there are few publications about the global dimensioning methodology of MMC converters, especially in high power application. It seems there are two points, which affect the lack of researches. First, academic researchers do not have access to the information of high power applications. Secondly, dimensioning design data is a part of confidential engineering documents of the companies and therefore, highly unlikely to be published publicly.
The main objective of this dissertation is to propose and implement of the converter sizing of the static converters applied to MMC structures. Providing a platform, which analyzes and executes the global optimal dimensioning algorithm, utilizing the specifications of a MMC industrial converter application, verification of algorithm parameters, finding the optimal solution for the industrial application and extending the algorithm for other applications are the secondary objectives.
This dissertation introduces the converter sizing methodology in order to optimize the MMC converters. Chapter 1 presents a definition for MMC converter and explains the history of modular multilevel converters. Then it introduces different topologies of MMC converter and investigates their advantages and disadvantages. In addition, the important industrial application of MMC converters with an industrial example is presented.
In chapter 2, the main Ph.D. objectives are explained. The converter sizing model is defined to implement to the high power MMC converters. Also, the validation tool in order to verify our methodology is introduced.
In chapter 3, the average steady-state model and its advantages and weakness are presented. Then, to enhance the model performance, the time-domain steady-state model is introduced and investigated. Finally, in order to validate the proposed model, the outputs are compared with the outputs of a Simulink model.
4
In chapter 4, the methodology of MMC converter optimization is investigated and clarified. The plan of the optimization loop is proposed and detail sections of the global optimization loop are introduced and explained. Also, the software which must be used to integrate the optimization loop is identified and the validation method with the specifications of the MMC converter industrial application is investigated.
The dimensioning analysis of converter components is presented in chapter 5. Using an analytical approach, the mathematical mass function of capacitor and inductor are extracted and added to the optimization algorithm. Then, an optimization is done to minimize the total converter mass regarding the mass functions.
In order to increase the analytical model accuracy especially in the case of the magnetic model, a novel hybrid optimization model is presented in chapter 6. It consists a combination of analytical model and finite element approach which intensely increases the model accuracy while the optimization time does not increase so much. The mass minimization is repeated using new optimization algorithm and the result is discussed.
In chapter 7, the optimal converter is investigated and analyzed in the defect condition in order to minimize the converter damage in fault condition. This study is done using two different methods. The first one is to send the optimal parameters to Simulink and make a co-simulation in the defect condition using Matlab/Simulink. The second one is to add the defect analysis to the time domain model to calculate the extra constraints while the optimization is running.
Finally, in chapter 8, the future works in the field of the high power modular multilevel converter is investigated. The optimization results and the proposed approach is investigated and summarized.
1.2. Relevant State of the Art and Problem Description
In response to the demands of high-power systems and to supply the requirements of the industrial processes powered by large electric ac drive systems, two different solutions are proposed by power electronics researchers:
5
• Conventional two-level voltage/current source topologies comprising voltage/current-rated power switches based on developing and immature high-voltage semiconductor technology (currently 8 kV and 6 kA);
• Multilevel power converters covering a power range from several MW to tens of MW based on matured semiconductor technology of medium-voltage/current rated power switches (currently 1.2 kV up to 6.6 kV) [3].
Although the first approach leads to the simplicity of power and control circuit, two-level power converters suffer from major disadvantages of augmented price of newer high-power semiconductors and power quality concerns, specifically as going higher in the power ranges. In turn, multilevel power converters bring many technical advantages such as extended power range due to the capability of the multilevel topologies to handle the voltage and power in the range of several kV and MW utilizing reliable medium voltage insulated gate bipolar transistors (IGBTs), improved harmonic content of the switched output voltage, and hence increased power quality, increased reliance on power converter operation owing to possible fault-tolerant feature, lowered electromagnetic interference and upgraded electromagnetic compatibility, lowered switching losses, enhanced efficiency, and reduced amount of output filter, etc. [3-7].
Nowadays, three commercial topologies of multilevel voltage-source inverters were introduced as classical topologies: neutral point clamped (NPC) [8], cascaded H-bridge (CHB) [9], and flying capacitors (FCS) [10]. Among these inverter topologies, cascaded multilevel inverter reaches the higher output voltage and power levels (13.8 kV, 30 MVA) and the higher reliability due to its modular structure.
In the field of high power application, multilevel converters with a high number of levels seem to be the most suitable types, because of the need for series connection of semiconductors in combination with low voltage distortion on the line side. There are many other important aspects have to be taken into account for these applications. MMC converter is the technique of using standard commutation cells in series and parallel compositions in order to achieve higher voltage and current with conventional semiconductor switches. The main technical and economic aspects of the development of multilevel converters are [11]:
6 1. Modular realization
• Scalable to different power voltage levels
• Independent of the fast development of semiconductor switches • Developing power devices
• Expandable to any number of voltage steps • Dynamic division of voltage to the power devices 2. Multilevel waveform
• low total harmonic distortion • use of approved devices • redundant operation
3. Investment and life cycle cost • standard components
• modular construction 4. High availability 5. Failure management
Since 50 years ago that multilevel conversion was introduced, several multilevel converters are used to increase power and reduce THD. Because of the limited current capability of the cables and semiconductor devices, high power systems need a type of converters which able to operate with more than a thousand hundred volts.
The multilevel converters provide us the possibility of working at a high-voltage and high current level, with a better efficiency and power quality. In high power systems, the current and voltage ratings can easily go beyond the range the existing semiconductor switches. Multicell interleaved converters which are connected in parallel or series is an interesting solution for high power application. However, extra measures should be taken for equal sharing of the current or voltage among the parallel or series devices. In multilevel structures, due to the interleaved modulation technique, it is possible to achieve a series of advantages [12], such as:
• Quasi-sinusoidal AC voltage waveform • Low harmonic impact
7 • Possible direct connection to the MV grid
• Reduction of semiconductor losses due to a very low single-switching frequency per device
Multilevel converters include an array of power semiconductors and capacitor voltage sources, the output of which generate voltages with stepped waveforms. The commutation of the switches permits the addition of the capacitor voltages, which reach a high voltage at the output, while the power semiconductors need to be able to withstand only partial of the total voltage.
For completeness and a better understanding of the advances in multilevel technology, it is necessary to review the classic multilevel converter topologies. However, in order to focus the content of this thesis on the most recent advances and ongoing research lines, well-established topologies will only be briefly introduced and referred to existing literature.
1.3. History and MMC Definition
History of multilevel inverters began in 1975 with Baker and Bannister. This first patent described a converter topology capable of producing a multilevel voltage by connecting single phase inverter in series.
The multilevel converter has been developed to compensate the shortcomings in solid-state switching device ratings and technology so that they can be applied to high-voltage electrical systems. The special topology of multilevel voltage converters allows them to obtain high voltages with low harmonics without the use of transformers [11].
Since last two decades, the demand for medium and high voltage power converters has grown to provide medium and high voltage output with the low harmonic rate. The application of these converters is HVDC links, static VAR compensators, traction motor variable speed drives and active filtering. Multilevel power converters have been introduced and presented as a solution in high voltage and medium voltage applications. MMC provides a cost-effective solution in the medium and high voltage energy management market. A multilevel converter has several advantages over a conventional two-level converter that uses high switching frequency Pulse Width Modulation (PWM). The attractive advantages of a multilevel converter can be briefly summarized as follows:
8
Harmonic distortion: Multilevel converter is based on energy conversion using small
voltage steps, their output waveforms are close to the sinusoidal wave. Hence, it contains less harmonic distortion.
Electromagnetic compatibility: Multilevel converters not only can generate the output
voltage with very low distortion but also can reduce the dv/dt stresses; therefore, Electromagnetic Compatibility (EMC) problems can be reduced.
Common-Mode (CM) voltage: Multilevel converters produce smaller CM voltage;
therefore, the stress in the bearings of a motor connected to a multilevel motor drive can be reduced. Furthermore, CM voltage can be eliminated by using advanced modulation strategies [13].
Input current: The input current of multilevel converters has very low distortion.
Switching frequency: Multilevel converters operates at both fundamental switching
frequency as well as high switching frequency PWM [1, 11].
Multilevel converters have some disadvantages. One of the most important disadvantages is the greater number of power semiconductor switches needed. Although lower voltage rated switches can be utilized in a multilevel converter, each switch requires a related gate drive circuit. This may cause the overall system to be more expensive and complex.
The number of multilevel converter topologies has been introduced during the last two decades. The researches have concentrated on novel converter topologies and unique modulation schemes. Moreover, three different major multilevel converter structures have been reported in the literature: cascaded H-bridges converter with separate dc sources, diode clamped (neutral clamped), and flying capacitors (capacitor clamped). Furthermore, abundant modulation techniques and control schemes have been developed for multilevel converters such as sinusoidal pulse width modulation (SPWM), selective harmonic elimination (SHE-PWM), space vector modulation (SVM), and others. In addition, many multilevel converter applications focus on industrial medium-voltage motor drives [1, 14, 15], utility interface for renewable energy systems [16], flexible AC transmission system (FACTS) [17], and traction drive systems [18].
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1.4. Description of Multilevel structures
In the following, classic topologies will be referred to those that have extensively been analyzed and documented and have been commercialized and used in practical applications for more than a decade. The more important configurations of multilevel converters are:
1. Neutral Point Clamped (NPC) 2. Flying capacitor
3. Cascaded Multilevel Converters
1.4.1. Neutral Point Clamped (NPC)
The most commonly used multilevel topology is the diode clamped inverter, in which the diode is used as the clamping device to connect the dc bus voltage in order to take steps in the output voltage. In the natural point clamped topology, the diodes are the key difference between the two-level inverter and the three-level inverter. In Figure 1.1, a single-phase three-level and four levels version is shown, but it is possible to increase the number of level and legs (phase). In the three levels topology, using two diodes, it is possible to convert the voltage to half the level of the dc-bus voltage. In general, the voltage across each capacitor for an N level diode-clamped inverter at steady state is
1
dc V N
.
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In general, for an N level diode-clamped inverter, for each leg 21) switching devices, (N-1)(N-2) clamping diodes and (N-1) dc link capacitors are required. Increasing the number of levels leads to increase the number of diodes and the number of switching devices and makes the system impracticable to implement. In the PWM converters, the main constraint will be the reverse recovery of the clamping diode.
The component which characterizes this topology is the diode necessary to clamp the switching voltage to the half level of the DC bus, which is split into three levels by two series of connected bulk capacitors. In this topology, the middle point is also called the neutral point. By increasing the number of levels, the voltage which the diodes have to sustain rises. For a specific diode rating voltage, more devices are necessary to withstand the whole voltage. Therefore, if the number of voltage levels that the system can impose is N, 2(N-1) diodes are necessary. For high-DC voltages, the system becomes less convenient due to the huge number of diodes.
1.4.2. Flying capacitor
The Flying Capacitor is another multilevel topology, which is suitable for high-power applications. This topology is composed of the series connection of capacitor clamped switching cells. Figure 1.2 shows the topology of the multilevel flying capacitor.
The flying capacitor topology has some advantages when compared to the diode-clamped inverter. It does not need to clamping diodes. In addition, the flying capacitor inverter has switching redundancy within the phase, which is used to balance the flying capacitors so that only one dc source is needed.
The flying capacitor and diode clamped inverter have the same problem in implementation. A large number of bulk capacitors must be used and install. The voltage rating of each capacitor must be the same as the main power switch rating, an N level converter will require a total of (𝑁 − 1)(𝑁 − 2)/2 clamping capacitors per phase in addition to (𝑁 − 1) main dc bus capacitors.
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Figure 1.2: Multilevel flying capacitor topology
This topology also has other disadvantages which have limited its utilization. First of all, it needs the converter initialization. Before the converter can be modulated by any modulation scheme, the capacitors need to be charged with the required voltage level as the initial voltage. This complicates the modulation process and becomes a hindrance to the operation of the converter. The capacitor voltages must also be regulated under normal operation in a similar way to the capacitors of a diode clamped converter. Another problem of this topology is the rating of the capacitors. The capacitors have large fractions of the dc bus voltage across them.
The two topologies analyzed present a better reduction in the harmonics. Despite the improvements which they are able to reach, these kinds of multilevel converters present a series of limitations. For this reason, they did not succeed in these HV-application demands. Also, there are some problems which limit the utilization of this topology in industrial applications.
1. Unwanted EMI disturbances generated by a very high slope (di/dt) of the arm currents
2. The DC bulk capacitor stores a huge quantity of energy which leads to damages under faulty conditions.
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3. The stored energy of the concentrated DC capacitor at the DC-Bus results in extremely high surge currents and subsequent damage if short circuits at the DC-Bus cannot be excluded.
4. Harmonics on the AC current must always be suppressed.
1.4.3. Cascaded Multilevel Converters
These structures are characterized by a series connection of elementary converters that are normally identical. Each cell corresponds to a voltage level according to the particular modulation technique. It is possible to achieve the desired voltage waveform according to the imposed reference. Figure 1.3 shows the cascaded structure with elementary converter modules.
Figure 1.3: Multilevel cascaded converter with elementary converters
The cascaded structures ensure the modularity of the system by ensuring series industrial production. Due to modularity, they do not present upper DC voltage limits. In fact, it is possible to add more series cells to sustain the desired voltage. The converter is a composition of series-connected elementary cells. This converter offers the possibility to regulate the active and reactive power independently. Each phase is composed of two groups of elementary cells (1…N and N+1…2N), called branches. Each branch conducts the half-phase current. The advantages of using Cascaded Multilevel Converters are:
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• Arm inductances contribute to limit faulty conditions.
• The bulk capacitor is not necessary because there are two terminal cells.
• Each capacitor cell voltage can be controlled very slowly with respect to the current regulator.
• The DC link voltage can be controlled by the converter.
The typical structure of an MMC and the configuration of a Sub-Module (SM) are shown in figure 1.4. This sub-module is known as general commutation cell. Each sub-module is a simple chopper cell which is composed of two IGBT switches (T1 and T2), two anti-parallel diodes (D1 and D2) and a capacitor C. The commutation cell limits the maximum switch voltage. So, it is possible to achieve high voltage by a series connection of commutation cells (sub-modules). Icu T1 T2 Iu C
